[gameprogrammer] Re: Single producer consumer
- From: David Olofson <david@xxxxxxxxxxx>
- To: gameprogrammer@xxxxxxxxxxxxx
- Date: Mon, 13 Feb 2006 19:39:28 +0100
On Monday 13 February 2006 17:46, Kevin Jenkins wrote:
[...]
> I think that writes and reads are atomic on single processor
> systems.
Yes; AFAIK, no widely used CPUs will interrupt in the middle of
instructions. I'm not so sure about constructs like 68k MOVEM (move
multiple registers to/from the stack) and the x86 REP prefix, though;
I wouldn't rely on those being atomic unless I knew exactly what the
code would run on.
Anyway, reads and writes are atomic to some extent on SMP systems as
well - but the maximum word size is defined by the bus logic rather
than the CPU instructions. Obviously, read-modify-write instructions
and similar won't be atomic on SMP systems, unless they're wired to
special chipset logic.
However, on some platforms, the "atomic_t" of the SMP bus/switch is
smaller than the "atomic_t" of the same CPU in a UP system! Could
theoretically be one byte, or even less, but worst case I know of
(apart from 8 and 16 bit architectures) is 24 bits.
> I updated my single producer consumer to work even for non-atomic
> reads and writes.
>
> http://www.rakkar.org/sourcecode/SingleProducerConsumer.h.txt
[...]
There are quite a few operations in there... Have you considered every
single combination of context switching patters? Keep in mind that in
an SMP system, you could literally see the reader and writer
executing their respective critical code sections at the very same
time, resulting in various word-by-word alternating access patterns.
//David Olofson - Programmer, Composer, Open Source Advocate
.------- http://olofson.net - Games, SDL examples -------.
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