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Hello,
I tested to code and it worked like expected. Couple size and base
address definions where incorrect and I searched correct values for
them from STM32F334 reference manual (RM0364). The attachemnt contains
all the changes in one patch.
Is it Eero ok if I send the patch to texane to be included in official
version?
- -Lari
On 02.09.2014 09:13, Eero Hakala wrote:
> Hi, I made some changes in stlink to get our nucleo flashed -
> could somebody please review this because I have not been able to
> figure out all details (they are well hidden in st-pages).
>
>
> This is the general process of setting up the environment:
> git@xxxxxxxxxx:texane/stlink.git
>
> then in stlink directory ./autogen ./configure make
>
> And voila, all ready: st-util and st-flash look like functional -
> some probelms still with st-info and st-term...
>
>
> Changes to be revied are in src/stlink-common.c and
> src/stlink-common.h:
>
> This is what diff gives out eero@tkone:~/swe/sula$ diff
> stori/src/stlink-common.h stlink/src/stlink-common.h 128a129
>> #define STM32_CHIPID_F334 0x438
> 326a328,338
>> .bootrom_base = 0x1ffff000, .bootrom_size = 0x800 }, { // This is
>> STK32F334R8 device from STM32 nucleo board // Support based on
>> 303 above (37x and 30x have same
> memory map)
>> .chip_id = STM32_CHIPID_F334, .description = "ähväkolomonen
>> device", .flash_size_reg = 0x1ffff7cc, .flash_pagesize = 0x800,
>> .sram_size = 0x4000,
>
> But its in fact wrong because I just added an elemnt in the data
> structure, not something in between as diff thinks, the change is
> just an addition as below: addition from 331 to 341 { // This is
> STK32F334R8 device from STM32 nucleo board // Support based on 303
> above (37x and 30x have same memory map) .chip_id =
> STM32_CHIPID_F334, .description = "ähväkolomonen device",
> .flash_size_reg = 0x1ffff7cc, .flash_pagesize = 0x800, .sram_size =
> 0x4000, .bootrom_base = 0x1ffff000, .bootrom_size = 0x800 },
>
> Then I just added the missing chip info to the most suitable place
> every time that st-flash complained something! As I don't know all
> differences these additions might be in a wrong place!
>
> eero@tkone:~/swe/sula$ diff stori/src/stlink-common.c
> stlink/src/stlink-common.c 1130c1130,1131 < ||
> sl->chip_id == STM32_CHIPID_F37x) { ---
>> || sl->chip_id == STM32_CHIPID_F37x || sl->chip_id ==
>> STM32_CHIPID_F334) {
> 1361c1362 < } else if (sl->core_id == STM32VL_CORE_ID ||
> sl->chip_id == STM32_CHIPID_F3 || sl->chip_id ==
> STM32_CHIPID_F37x) { ---
>> } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id ==
> STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x || sl->chip_id
> == STM32_CHIPID_F334) { 1658c1659 < } else if (sl->core_id ==
> STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id ==
> STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { ---
>> } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
> STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id
> == STM32_CHIPID_F37x || sl->chip_id == STM32_CHIPID_F334) {
> 1762c1763 < } else if (sl->core_id == STM32VL_CORE_ID ||
> sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3
> || sl->chip_id == STM32_CHIPID_F37x) { ---
>> } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
> STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id
> == STM32_CHIPID_F37x || sl->chip_id == STM32_CHIPID_F334) {
> 1794c1795 < #define WAIT_ROUNDS 10000 ---
>> #define WAIT_ROUNDS 100000
> 1821c1822 < } else if (sl->core_id == STM32VL_CORE_ID ||
> sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3
> || sl->chip_id == STM32_CHIPID_F37x) { ---
>> } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
> STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id
> == STM32_CHIPID_F37x || sl->chip_id == STM32_CHIPID_F334) {
>
>
> -eero-
>
> PS find below output from st-util and st-link
>
>
> ./st-flash write
> /home/eero/swe/RIOT/examples/hello-world/bin/stm32f3discovery/hello-world.hex
>
>
0x08000000
> 2014-09-02T08:44:17 INFO src/stlink-common.c: Loading device
> parameters.... 2014-09-02T08:44:17 INFO src/stlink-common.c: Device
> connected is: ähväkolomonen device, id 0x10016438
> 2014-09-02T08:44:17 INFO src/stlink-common.c: SRAM size: 0x4000
> bytes (16 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 2048
> bytes 2014-09-02T08:44:17 INFO src/stlink-common.c: Attempting to
> write 36044 (0x8ccc) bytes to stm32 address: 134217728 (0x8000000)
> Flash page at addr: 0x08008800 erased 2014-09-02T08:44:17 INFO
> src/stlink-common.c: Finished erasing 18 pages of 2048 (0x800)
> bytes 2014-09-02T08:44:17 INFO src/stlink-common.c: Starting Flash
> write for VL/F0 core id 2014-09-02T08:44:17 INFO
> src/stlink-common.c: Successfully loaded flash loader in sram 17/17
> pages written 2014-09-02T08:44:19 INFO src/stlink-common.c:
> Starting verification of write complete 2014-09-02T08:44:20 INFO
> src/stlink-common.c: Flash written and verified! jolly good!
>
> eero@tkone:~/swe/sula/stlink$ ./st-util -v99 2014-09-02T08:45:09
> DEBUG src/stlink-common.c: stlink current mode: debug (jtag or
> swd) 2014-09-02T08:45:09 DEBUG src/stlink-common.c: stlink current
> mode: debug (jtag or swd) 2014-09-02T08:45:09 INFO
> src/stlink-common.c: Loading device parameters....
> 2014-09-02T08:45:09 DEBUG src/stlink-common.c: *** stlink_core_id
> *** 2014-09-02T08:45:09 DEBUG src/stlink-common.c: core_id =
> 0x2ba01477 2014-09-02T08:45:09 DEBUG src/stlink-common.c: ***
> stlink_read_debug32 10016438 is 0xe0042000 2014-09-02T08:45:09
> DEBUG src/stlink-common.c: *** stlink_read_debug32 ffff0040 is
> 0x1ffff7cc 2014-09-02T08:45:09 INFO src/stlink-common.c: Device
> connected is: ähväkolomonen device, id 0x10016438
> 2014-09-02T08:45:09 INFO src/stlink-common.c: SRAM size: 0x4000
> bytes (16 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 2048
> bytes 2014-09-02T08:45:09 DEBUG src/stlink-common.c: *** looking up
> stlink version 2014-09-02T08:45:09 DEBUG src/stlink-common.c: st
> vid = 0x0483 (expect 0x0483) 2014-09-02T08:45:09 DEBUG
> src/stlink-common.c: stlink pid = 0x374b 2014-09-02T08:45:09
> DEBUG src/stlink-common.c: stlink version = 0x2 2014-09-02T08:45:09
> DEBUG src/stlink-common.c: jtag version = 0x14
> 2014-09-02T08:45:09 DEBUG src/stlink-common.c: swim version =
> 0x4 2014-09-02T08:45:09 DEBUG src/stlink-common.c: *** stlink_reset
> *** 2014-09-02T08:45:09 INFO gdbserver/gdb-server.c: Chip ID is
> 00000438, Core ID is 2ba01477. 2014-09-02T08:45:09 DEBUG
> src/stlink-common.c: *** reading target voltage 2014-09-02T08:45:09
> DEBUG src/stlink-common.c: target voltage = 3232mV
> 2014-09-02T08:45:09 INFO gdbserver/gdb-server.c: Target voltage is
> 3232 mV. 2014-09-02T08:45:09 INFO gdbserver/gdb-server.c: Listening
> at *:4242... ^C2014-09-02T08:45:14 DEBUG src/stlink-common.c: ***
> stlink_run *** 2014-09-02T08:45:14 DEBUG src/stlink-common.c: ***
> stlink_exit_debug_mode *** 2014-09-02T08:45:14 DEBUG
> src/stlink-common.c: *** stlink_write_debug32 a05f0000 to
> 0xe000edf0 2014-09-02T08:45:14 DEBUG src/stlink-common.c: ***
> stlink_close ***
>
>
- --
Lari Lehtomäki
lari at lehtomaki dot fi
050 320 7920
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From add3285b5de9f9a2d845e81c6d54d4553453eec7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lari=20Lehtom=C3=A4ki?= <lari@xxxxxxxxxxxx>
Date: Mon, 8 Sep 2014 18:49:11 +0300
Subject: [PATCH] Adds support for STM32F334 MCU
---
src/stlink-common.c | 34 ++++++++++++++++++++++++++--------
src/stlink-common.h | 14 +++++++++++++-
2 files changed, 39 insertions(+), 9 deletions(-)
diff --git a/src/stlink-common.c b/src/stlink-common.c
index cd7979b..22f3655 100644
--- a/src/stlink-common.c
+++ b/src/stlink-common.c
@@ -1127,7 +1127,8 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t
flashaddr)
} else if (sl->core_id == STM32VL_CORE_ID
|| sl->core_id == STM32F0_CORE_ID
|| sl->chip_id == STM32_CHIPID_F3
- || sl->chip_id == STM32_CHIPID_F37x) {
+ || sl->chip_id == STM32_CHIPID_F37x
+ || sl->chip_id == STM32_CHIPID_F334) {
/* wait for ongoing op to finish */
wait_flash_busy(sl);
@@ -1358,7 +1359,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t*
addr, size_t* size) {
|| sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id ==
STM32_CHIPID_L152_RE) { /* stm32l */
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
- } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id ==
STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) {
+ } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id ==
STM32_CHIPID_F3 ||
+ sl->chip_id == STM32_CHIPID_F37x || sl->chip_id ==
STM32_CHIPID_F334) {
loader_code = loader_code_stm32vl;
loader_size = sizeof(loader_code_stm32vl);
} else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id ==
STM32_CHIPID_F4 || (sl->chip_id == STM32_CHIPID_F4_DE) ||
@@ -1540,8 +1542,12 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr,
uint8_t* base, uint32_t
ILOG("Finished erasing %d pages of %d (%#x) bytes\n",
page_count, sl->flash_pgsz, sl->flash_pgsz);
- if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)
|| (sl->chip_id == STM32_CHIPID_F4_DE) ||
- (sl->chip_id == STM32_CHIPID_F4_LP) || (sl->chip_id ==
STM32_CHIPID_F4_HD) || (sl->chip_id == STM32_CHIPID_F411RE)) {
+ if ((sl->chip_id == STM32_CHIPID_F2) ||
+ (sl->chip_id == STM32_CHIPID_F4) ||
+ (sl->chip_id == STM32_CHIPID_F4_DE) ||
+ (sl->chip_id == STM32_CHIPID_F4_LP) ||
+ (sl->chip_id == STM32_CHIPID_F4_HD) ||
+ (sl->chip_id == STM32_CHIPID_F411RE)) {
/* todo: check write operation */
ILOG("Starting Flash write for F2/F4\n");
@@ -1655,8 +1661,12 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr,
uint8_t* base, uint32_t
val = stlink_read_debug32(sl, flash_regs_base + FLASH_PECR_OFF)
| (1 << 0) | (1 << 1) | (1 << 2);
stlink_write_debug32(sl, flash_regs_base + FLASH_PECR_OFF, val);
- } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id ==
STM32_CHIPID_F37x) {
- ILOG("Starting Flash write for VL/F0 core id\n");
+ } else if (sl->core_id == STM32VL_CORE_ID ||
+ sl->core_id == STM32F0_CORE_ID ||
+ sl->chip_id == STM32_CHIPID_F3 ||
+ sl->chip_id == STM32_CHIPID_F334 ||
+ sl->chip_id == STM32_CHIPID_F37x) {
+ ILOG("Starting Flash write for VL/F0/F3 core id\n");
/* flash loader initialization */
if (init_flash_loader(sl, &fl) == -1) {
ELOG("init_flash_loader() == -1\n");
@@ -1759,7 +1769,11 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl,
stm32_addr_t target, cons
stlink_write_reg(sl, count, 2); /* count (32 bits words) */
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
- } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id ==
STM32_CHIPID_F37x) {
+ } else if (sl->core_id == STM32VL_CORE_ID ||
+ sl->core_id == STM32F0_CORE_ID ||
+ sl->chip_id == STM32_CHIPID_F3 ||
+ sl->chip_id == STM32_CHIPID_F37x ||
+ sl->chip_id == STM32_CHIPID_F334) {
size_t count = size / sizeof(uint16_t);
if (size % sizeof(uint16_t)) ++count;
@@ -1818,7 +1832,11 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl,
stm32_addr_t target, cons
return -1;
}
- } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id ==
STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id ==
STM32_CHIPID_F37x) {
+ } else if (sl->core_id == STM32VL_CORE_ID ||
+ sl->core_id == STM32F0_CORE_ID ||
+ sl->chip_id == STM32_CHIPID_F3 ||
+ sl->chip_id == STM32_CHIPID_F37x ||
+ sl->chip_id == STM32_CHIPID_F334) {
stlink_read_reg(sl, 2, &rr);
if (rr.r[2] != 0) {
diff --git a/src/stlink-common.h b/src/stlink-common.h
index 532f7d9..9f8b9cd 100644
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -125,7 +125,7 @@ extern "C" {
#define STM32_CHIPID_L1_HIGH 0x436
#define STM32_CHIPID_L152_RE 0x437
-
+#define STM32_CHIPID_F334 0x438
#define STM32_CHIPID_F3_SMALL 0x439
#define STM32_CHIPID_F0 0x440
@@ -399,6 +399,18 @@ extern "C" {
.bootrom_base = 0x1ff0000,
.bootrom_size = 0x1000
},
+ {
+ // STM32F334
+ // RM0364 document was used to find these parameters
+ .chip_id = STM32_CHIPID_F334,
+ .description = "F334 device",
+ .flash_size_reg = 0x1ffff7cc,
+ .flash_pagesize = 0x800,
+ .sram_size = 0x3000,
+ .bootrom_base = 0x1fffd800,
+ .bootrom_size = 0x2000
+ },
+
};
--
1.9.1
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