Hi to All. Regarding the user mode and supervisor mode, on Cortex M-0 it implements the ARMv6-M base architecture, where all software runs on privileged mode. However, Cortex M-4 is a different story, as it implements ARMv7-M, which has both modes available on Thread mode (Handler mode is always privileged) As a design decision, what is the general idea when using the Cortex M-4 processor, will be a distinction between the user application and the system below it, or all the software will be developed as if it runs in privileged mode (as now on the Cortex M-0 processor of the Ellduino)? With Warm Regards, Ivan Raul On Wed, Feb 5, 2014 at 7:38 AM, Pekka Nikander <pekka.nikander@xxxxxx>wrote: > > I am trying to find out how many instructions can be executed between an > asynchronous exception is triggered and the handler is entered (for making > sure that the behaviour of PendSV is the desired one, as at some point we > will use blocking synchronization primitives) > > My suggestion would be to use a synchronous interrupt for entering from a > blocking primitive, e.g. SVCall. Remember too that if we don't have a > separate user mode and supervisor mode, it may be sufficient just to block > the interrupts and do the thing there, on the spot, not to separately enter > an interrupt routine through a vector. That would save a number of cycles > as well, making the primitive faster. > > > For Cortex M-0, i can't find it... Does anyone know about any reference > or document where it can be found, just to speed up the searching process? > > At least I don't know, but hopefully someone else does? > > --Pekka > > >