[ell-i-developers] About PendSV and SVCall

  • From: Pekka Nikander <pekka.nikander@xxxxxx>
  • To: Ivan Raul <supra.material@xxxxxxxxx>
  • Date: Sat, 15 Feb 2014 20:05:14 +0200

> [...] regarding the use of both, PendSV and SVCall. The main advantage that I 
> see to SVCall is the synchronous behaviour, that is quite useful with sync 
> primitives like the mutex system planned. Now that I know that there are only 
> 4 priorities in the CortexM0, I am thinking of the best way of ordering. 
> 
> PendSV is exception number 14
> SVCall is exception number 11

Table 27 in RM0091 on page 159 indicates that you can freely set the priority 
order.

> So if they are set with the same priority level, SVCall can preempt PendSV. 
> But as SVCall is not supposed to be called from any exception, and is 
> synchronous, then SVCall will never be able to preempt PendSV in practice. 

It's been a while since I read the ARM Cortex-M0 and STM32F0 interrupt 
documentation, but it should be noted that there are two interrupt controllers 
that interact.  One from ARM (NVIC), the other from STM (EXTI).  The must be 
both considered when thinking about interrupt priorities.  For PendSV and 
SVCall dealing with NVIC should be enough, though, as they are ARM core 
features.

That said, and while I admit I may well be wrong, I think the *same* priority 
level interrupts don't preempt each other.  Hence, if we configure PendSV and 
SVCall to be on the same priority level, they shouldn't interfere each other.  
Please correct me (with reference) if I'm wrong; I want to know.  Second, there 
is nothing that prevents you from executing the same code in different 
interrupt contexts.  Hence, we should be able to create just a single handler 
that handles both PendSV and SVCall, or alternatively to jump from SVCall 
directly to somewhere in PendSV code, if so needed.

--Pekka


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