[atari7800] Re: [personal] CTRL register RM bits

That's a good question, haven't heard of anyone trying that. If you look at
the GCC1702B MARIA Chip specs document it lists the 160 modes like this:

MODE            WM      RM1     RM0     CRA4    CRA3    CRA2    CRA1    CRA0

160(A)  0       0       X       P2      P1      P0      D7      D6

160(B)  1       0       X       P2      D3      D2      D7      D6


From this we can assume that setting RM to 1 is the same as setting it to 0.

Dan

-----Original Message-----
From: atari7800-bounce@xxxxxxxxxxxxx [mailto:atari7800-bounce@xxxxxxxxxxxxx]
On Behalf Of bob.montgomery@xxxxxxxxxxx
Sent: Friday, March 14, 2008 4:46 PM
To: atari7800@xxxxxxxxxxxxx
Subject: [personal] [atari7800] CTRL register RM bits


Thanks, Dan.

And here's another question, this time about the read bits in the CTRL byte.

Here's the Maria doc:

      RM1, RM0           -    Read Mode.
                              0 => 160x2, or 160x4
                              1 => Not used.
                              2 => 320B or 320D.
                              3 => 320A or 320C.

Has anyone done testing to see what happens if you set read mode to 1?
Anything interesting?

Thanks,

-Bob

-----Original Message-----
From: atari7800-bounce@xxxxxxxxxxxxx [mailto:atari7800-bounce@xxxxxxxxxxxxx]
On Behalf Of Dan Boris
Sent: Thursday, March 13, 2008 2:04 PM
To: atari7800@xxxxxxxxxxxxx
Subject: [atari7800] Re: [personal] First post and a question

I think the 6/9 already includes the 3 cycle character map access. A single
graphics byte takes 3 cycles, an indirect 1 byte (1 character map, 1
graphics data) takes 6 cycles, and an indirect 2 byte (1 character map, 2
graphics data) takes 9 cycles. 

Dan

Other related posts: