FreeLists / pcdlist / [pcdlist] Re: CAF

["Clyde Sprowl" <fpds@xxxxxxxxxxx>]

Your best bet is to follow the standard until you run a Design for
Experiment for your particular situation to collect empirical data that
justifies a deviation from the standard. That standard was written after
doing testing. Your design standard needs the same type of data if you're
wanting to reduce the spacings. My 2 cents worth..
Clyde Sprowl
C&B Contract PWB Design Services
Phone 260.356.7421
Fax 603.258.5520
http://personal.myvine.com/~fpds
----- Original Message -----
From: "Louis Guerin" <louis.guerin@xxxxxxxxxxx>
To: <pcdlist@xxxxxxxxxxxxx>
Sent: Thursday, December 05, 2002 15:23
Subject: [pcdlist] CAF


>
> Hi,
> I'm searching documentations about CAF (Conductive Anodic Filament)
> formation. We are designing PCB's with circuitry generating pulses in the
> 300V to 400V range and  having a supply around 450V. I know by IPC related
> documentation which spaces I need to keep, but these values, in my
opinion,
> are like to be for a circuitry on the primary side (i.e. circuitry
connected
> to the wall plug) which need to withstand spike surge of a few hundreds
> volts and remain operational. Our circuit is isolated from the primary
side
> and do not need this kind of extra security.
> In the last PCD Design issue (December 2002), Bernard Voss wrote that the
> dielectric strength of PCB's materials are based on a hi-pot test which is
> measured on a short term period. Our circuits have to work 24 hours a day,
> all year round.
> Any info on the subject will be appreciated.
> Thanks,
>
> Louis Guérin
> PCB Designer
> R/D Tech Inc.
> 505 boul. du Parc-Technologique
> Quebec, Qc
> G1P 4S9
>
> Tel.: (418) 263-3647
> Fax: (418) 263-3742
> Email: louis.guerin@xxxxxxxxxxx
>
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