FreeLists / si-list / [SI-LIST] Re: Why is capacitor with high ESR

["Slawek Guzek" <sguzek@xxxxxxxxx>]

Steve,

In general yes, but...

Vias should be conected to ground plane and placed quite close each other
as I wrote not more than 1/16, (much closer if possible) of shortest wavelength 
expected to be excited.  So you should not see any of peaks and valleys
because propagating wave will be significally longer than distance between vias.

On the other hand vias have some inductance, so short (or ground plane 
connection 
will not be perfect, but I think it would better reflect internal EM wave than 
just 
open end of PCB.

Another solution  which comes to my mind is to make thin border around every
layer, and then make a metallisation of PCB edge.

Like this:

Top ground              -----------] <- edge metallisation
Internal signal 1               -------  --] <- edge metallisation
internal power          -------  --] <- edge metallisation
.                       -------  --] <- edge metallisation
.                       -------  --] <- edge metallisation
Bottom ground           -----------] <- edge metallisation

Regardsm


> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]On 
> Behalf Of steve weir
> Sent: Saturday, December 04, 2004 11:57 AM
> To: sguzek@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Why is capacitor with high ESR
> 
> 
> Slavek the issues with ground fences:
> 
> 1. The reflected energy hits vias which provide a path to the top of the 
> board and features that radiate.
> 2. The decoupling response exhibits a series of peaks and valleys on 
> quarter wave multiples.
> 
> An ideal plane termination would absorb all the energy and eliminate both 
> effects.
> 
> Steve.
> At 09:07 AM 12/4/2004 +0100, Slawek Guzek wrote:
> >Dear Zhangkun,
> >
> >[....]
> >
> > > According to the transmission line theory, when the transmission line 
> > is matched, there is no resonance. At the edge of
> > > PCB, the EM energy is reflected because the transmission line is OPEN.
> >
> >I think you've made some small error in your concept. Indeed, EM energy is 
> >reflected IF line IS open,
> >but at the end of the PCB line in not perfectly open -  ground plane and 
> >power plane form a radiating
> >element - a kind of a dipole.  Some of the EM energy is radiated outside, 
> >because of variable E field
> >lines at the PCB edge closed through air from power to ground plane
> >
> >
> > > Traditional decoupling capacitors are of low ESR,
> > > which could not damping the resonance. Therefore I need capacitor with 
> > high ESR, whose ESR should be matched with the
> > > transmission line. On the other hand, the ESL is critical at high 
> > frequency. The ESL should be as small as possible. The
> > > package of capacitor mainly determines ESL so that the package should 
> > be as small as possible, such as 0402 or 0603. The
> > > capacitance should be as large as possible so that some benifit could 
> > be gotten at lower freqeuncy domain.
> >
> >
> >It is much easier get close to perfect short circuit than close to perfect 
> >open, so in my opinion,
> >from EMI point of view, it could be much more efficient to finish power 
> >plane with some margin to
> >PCB edge, and fill up this space with vias connected to ground plane, 
> >spaced not more than 1/16
> >(one says even 1/100) of shortest wavelength you expect to be excited 
> >between power and ground planes.
> >That case RF energy really reflects back into PCB, noises on traces 
> >perhaps would be greater,
> >but significantly smaller portion would be radiated.
> >
> >Regards,
> >Slawek
> >
> >
> >
> >
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