
|
[si-list]
||
[Date Prev]
[12-2004 Date Index]
[Date Next]
||
[Thread Prev]
[12-2004 Thread Index]
[Thread Next]
[SI-LIST] Re: PCI and Spread Spectrum Clocking
- From: npaul@xxxxxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 3 Dec 2004 14:48:41 -0000
I am also concerned with devices running off of spread spectrum
clocks. In my application I recieve serial data with SERDES and
clock it through a Virtex FPGA (using the DCM).
I took the approach of calculating the equivalent jitter resulting
from a triangular SSC modulation, expressed as pS of period change
on consecutive periods. For example, in PCI Express,
I calculated .021 pS as the quivalent jitter. This seems
quite small.
Is this a valid method for looking at spread spectrum compatibility?
Paul Taddonio
Product Design Engineer
paul.taddonio@xxxxxxxxxxxxxx
(posted from my home email address because my at-work ISP
is apparently blacklisted as a spammer)
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
http://www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
|

|