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Thread Index for si-list, 12-2003
[si-list] || [12-2003 Date Index] [12-2003 Thread Index]
- [SI-LIST] How frequency effects L, C & Z,
Rich Peyton
- [SI-LIST] XTK simulation,
BRanjul
- [SI-LIST] Re: How frequency effects L, C & Z,
Geoff Stokes
- [SI-LIST] Re: Dielectric constant for FR4 at above 1Ghz frequency,
Loyer, Jeff
- [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz,
Haddadin, Farah
- [SI-LIST] DDR propagation delay and packaging,
Perry Qu
- [SI-LIST] Re: Hspice Fieldsolver Question,
Liu, Bowen
- [SI-LIST] Stripline vs. Parallel Plate Impedances,
Loyer, Jeff
- [SI-LIST] Re: DDR propagation delay and packaging,
Bradley S Henson
- [SI-LIST] About the position of capacitors,
"Fu, Greg (傅?操 IES)"
- [SI-LIST] Re: Transmission Lines Information,
Venkata Ramana
- [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - First Announcement & Call for Participation+Presentations,
Ralf Bruening
- [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - First Announcement & Call for Participation+Presentations (resend due to a typo in location),
Ralf Bruening
- [SI-LIST] 2N 3019 PSPICE model,
munish
- [SI-LIST] Recall: About the position of capacitors,
"Fu, Greg (傅?操 IES)"
- [SI-LIST] 1N 4148 diode,
munish
- [SI-LIST] Fw: 1N 4148 diode,
munish
- [SI-LIST] Dual stripline orthogonal design rule,
Jim Steigel
- [SI-LIST] Re: Dielectric constant for FR4 at above 1Ghz frequency,
Chris McGrath
- [SI-LIST] Wave pipelining,
manthos labropoulos
- [SI-LIST] flight time and propagation delay in Hspice,
=?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?=
- [SI-LIST] ENERGY METERS,
munish
- [SI-LIST] [LISTS] ENERGY METERS,
munish
- [SI-LIST] Designing a breakout board for high speed boards,
si_fan_1
- [SI-LIST] state machine,
Alicia Corrales Chanca
- [SI-LIST] Re: state machine,
Ruth Sims
- [SI-LIST] Crystal Oscillator i/p & o/p nodes,
Parthasarathy Sampath
- [SI-LIST] First Call for Papers for the IBIS Summit at DesignCon,
Lynne Green
- [SI-LIST] SPICE or IBIS,
package_char
- [SI-LIST] Re: Bit OT: Coax Recommendations,
Michael Poimboeuf
- [SI-LIST] Re: SPICE or IBIS,
Mirmak, Michael
- [SI-LIST] Re: flight time and propagation delay in Hspice,
Muranyi, Arpad
- [SI-LIST] Urgent: LPC to RS232 Convertor,
Hora Abu
- [SI-LIST] Signals crossing power plane split,
Fabrizio Zanella
- [SI-LIST] Re: Urgent: LPC to RS232 Convertor,
Harjeet Randhawa
- [SI-LIST] IPC standards,
munish
- [SI-LIST] nonlinear in power ground noise of clock driver,
Zhangkun
- [SI-LIST] Re: nonlinear in power ground noise of clock driver,
Curt McNamara
- [SI-LIST] Re: Signals crossing power plane split,
Loyer, Jeff
- [SI-LIST] one questin about Vih,Vil,choose 0.5Vcc or 0.6Vcc or 2.0? little confused!,
=?big5?b?SG91S2V2aW4oq0ql/qaoKQ==?=
- [SI-LIST] s2ibis3,
Ambrish Varma
- [SI-LIST] spice modeling of ferrite components,
Raymond Anderson
- [SI-LIST] Modeling and measurement of power distribution system,
Tegan Campbell
- [SI-LIST] Re: Modeling and measurement of power distribution system,
Grasso, Charles
- [SI-LIST] Re: urgent: LPC to RS232 converter,
Hora Abu
- [SI-LIST] Urgent: IBIS Summit at DesignCon,
Lynne Green
- [SI-LIST] return path,
upender a
- [SI-LIST] Spice modeling of ferrite beads/inductors,
Raymond Anderson
- [SI-LIST] HFSS Feeding the patch,
Arindam Neil Mallik
- [SI-LIST] HFSS Feeding,
neilmallik
- [SI-LIST] EFTB filetr,
Venkateswara Rao
- [SI-LIST] Hello,
mahamud khandokar
- [SI-LIST] Looking for a job,
mahamud khandokar
- [SI-LIST] mahamud khandokar's resume,
mahamud khandokar
- [SI-LIST] HFSS Simulations,
neilmallik
- [SI-LIST] s parameters and transient simulation,
Geoff Stokes
- [SI-LIST] I have a question related package parasitic extraction.,
KD KIM
- [SI-LIST] Re: s parameters and transient simulation,
Smith, David TQO
- [SI-LIST] Re: I have a question related package parasiticextraction.,
Patrick Zilaro
- [SI-LIST] Re: si design,
mahamud khandokar
- [SI-LIST] Return Current,
Zhangkun
- [SI-LIST] VTT for ECL,
David Cohen
- [SI-LIST] Re: I have a question related package parasitic extraction,
Jayaprakash
- [SI-LIST] HSpice / IBIS,
kegan
- [SI-LIST] Meeting Tonight! SCVEMC, Santa Clara, CA,
hansm
- [SI-LIST] Can anybody help me out?! about the quality factor of inductor,
eegjf
- [SI-LIST] nonlinear in power ground noise of clock driver(which kind of mistakeI have maken),
Zhangkun
- [SI-LIST] PWM noise current troubleshooting,
Doug Smith
- [SI-LIST] Checking mail (Null),
Zhangkun
- [SI-LIST] Power integrity / Transient current in Target impedance,
Saeed Bakhshi
- [SI-LIST] Hspice questions,
=?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?=
- [SI-LIST] Re: Hspice questions,
Clewell, Craig
- [SI-LIST] Ansoft Q2D and Swept Impedance Parameters,
Doug White
- [SI-LIST] Re: Power integrity / Transient current in Target impedance,
Grasso, Charles
- [SI-LIST] Re: Ansoft Q2D and Swept Impedance Parameters,
Bill Beale
- [SI-LIST] Coaxial TEM Cutoff Frequency,
Moeller, Merrick
- [SI-LIST] Job Opening at Ansoft,
Sherry Hess
- [SI-LIST] Re: Coaxial TEM Cutoff Frequency,
jeff_latourrette
- [SI-LIST] How to reduce the impedance?,
"Fu, Greg (傅?操 IES)"
- [SI-LIST] Enquiry on using Polyline to draw the CPW Copper Trace using HFSS,
Toh T S
- [SI-LIST] waveform analysis,
munish
- [SI-LIST] extracting capacitance from mems,
kaustubh bhate
- [SI-LIST] impedance for 10-mile pipe at 120Hz, skin effect,
aballe73
- [SI-LIST] Re: How to reduce the impedance?,
Beal, Weston
- [SI-LIST] Second Call for Papers for IBIS Summit at DesignCon,
Lynne Green
- [SI-LIST] IBIS models - What is the difference between Tri-Out & Tri-In,
Rakesh Metha
- [SI-LIST] Fw: 5V To 3V,
Steve GullWing UK
- [SI-LIST] The latest research progress about signal integrity,
paulwgq2003
- [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - Second Announcement & Call for Participation+Presentations,
Ralf Bruening
- [SI-LIST] cpw impedance,
kaustubh bhate
- [SI-LIST] Re: Fw: 5V To 3V,
Tayyab Jamil
- [SI-LIST] Re: IBIS models - What is the difference between Tri-Out & Tri-In,
Peterson, James F (FL51)
- [SI-LIST] [OT] Offshore engineering (beating a dead horse),
McCoy, Bart O.
- [SI-LIST] IBIS 4.0 parser (ibischk4) on-line!,
Mirmak, Michael
- [SI-LIST] How they measure true RMS,
Doug Brooks
- [SI-LIST] Common mode chokes - SPICE-Models,
Dirk Eyfrig
- [SI-LIST] RBSOA of Transistor,
munish
- [SI-LIST] Re: Common mode chokes - SPICE-Models,
Markku.Rouvala
- [SI-LIST] Surface Mount resistor for high frequency,
Andy Kuo
- [SI-LIST] Re: Surface Mount resistor for high frequency,
msharpes
- [SI-LIST] Different types of Critical Net Shilding,
naresh vijay
- [SI-LIST] RMCEMC Presentation slides available,
Charles Grasso
- [SI-LIST] RMCEMC December slides available for download,
Charles Grasso
- [SI-LIST] RBSOA,
munish
- [SI-LIST] Re: Different types of Critical Net Shilding,
Goswami, Sumit
- [SI-LIST] TI-Spice,
Liqun Wang
- [SI-LIST] Info on Spice package,
Kevin Buchanan
- [SI-LIST] Email change, IBIS Summit at DesignCon,
Lynne Green
- [SI-LIST] Re: Common mode chokes,
ÖܽÜ
- [SI-LIST] High frequency transmission,
Kirti Barpande
- [SI-LIST] Differences between HFSS Simulation Result and Agilent's ADS Momentum,
Toh T S
- [SI-LIST] Tell me about USB ?,
Steve Rogers
- [SI-LIST] Re: TI-Spice,
yossia
- [SI-LIST] Re: Tell me about USB ?,
Steve GullWing UK
- [SI-LIST] speaking of usb,
Eric Steimle
- [SI-LIST],
Nanda
- [SI-LIST] Re: Differences between HFSS Simulation Result and Agilent's ADS Momentum,
Grasso, Charles
- [SI-LIST] Re: Looking for UL Specs,
Steve Rhoton
- [SI-LIST] unsubscribe,
Mark Potter
- [SI-LIST] lossy dielectrics and causality,
Alan Hussey
- [SI-LIST] PREVENTING EMISSIONS IN USB SYSTEM,
Steve Rogers
- [SI-LIST] Stitching CAPs between DDR VDD and VTT Power Rails,
Harjeet Randhawa
- [SI-LIST] 'unsubscribe',
Moustapha Abdi Hassan
- [SI-LIST] Re: Differences between HFSS Simulation Result and Agilent's ADS Momentum,
D G
- [SI-LIST] test for coax cable,
Kobi Kivity
- [SI-LIST] Re: [Fwd: Optimization in Hspice],
venkat ramana
- [SI-LIST] Re: unsubscribe,
ÕÅÆæ
- [SI-LIST] hspice field solver question,
=?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?=
- [SI-LIST] hi,I am a new entry,azam(suggestions Please),
Muhammad azam
- [SI-LIST] Re: hspice field solver question,
Beal, Weston
- [SI-LIST] PWL(1) within HSPICE,
sivi.cla@xxxxxxxxx
- [SI-LIST] Problem in FE connection,
peter zhu
- [SI-LIST] REPOST: Optimization in Hspice,
Ingraham, Andrew
- [SI-LIST] Merry Christmas to one and all!!,
Grasso, Charles
- [SI-LIST] problems about 1-to-2 FE connection,
peter zhu
- [SI-LIST] 0.8mm BGA routing,
Tayyab Jamil
- [SI-LIST] Re: 0.8mm BGA routing,
Dimiter Popoff
- [SI-LIST] RESEND: Stitching CAPs between DDR VDD and VTT Power Rails,
Ingraham, Andrew
- [SI-LIST] Sam Turner/AALC/AlcatelAustralia is out of the office.,
Sam . Turner
- [SI-LIST] Re: RESEND: Stitching CAPs between DDR VDD and VTT Power Rails,
Harjeet Randhawa
- [SI-LIST] Approx. value of board and socket capacitance,
Anshu VIJ
- [SI-LIST] Re: Approx. value of board and socket capacitance,
Harjeet Randhawa
- [SI-LIST] SCR reliability criteria,
munish
- [SI-LIST] IBIS Model Parasitic,
ARiazi
- [SI-LIST] differential line,
Zhangkun
- [SI-LIST] request form,
Sanjay Kumar
- [SI-LIST] Re: differential line,
Grasso, Charles
- [SI-LIST] Bypass Capacitor Selection,
SI List
- [SI-LIST] Re: Bypass Capacitor Selection,
Lee Ritchey
- [SI-LIST] 48V filtering,
David Shapiro
- [SI-LIST] Chassis and Digital grounds connection,
si_fan_1
- [SI-LIST] Re: 48V filtering,
Abhishek, Dev
- [SI-LIST] HAPPY NEW YEAR,
Venkateswara Rao
- [SI-LIST] Re: Chassis and Digital grounds connection,
BRanjul
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