FreeLists / si-list / [SI-LIST] Re: Decoupling of Oscillator

[Jim Roberts <jgroberts@xxxxxxxxxx>]

I would aslo concur that the reference or powerplane should be kept intact for
the 
majority of digital devices.
Regarding De-coupling of power connections on digital devices:

1.      Every digital [i.e. device with a threshold] is an AM/PM coverter.
        What that means is when you vary or modulate the amplitude you will 
convert
        it to a phase modulation.
2.      The conversion rate is dependent on the risetime of the digital signal 
and
the 
        amplitude of the signal.
Thus if the power to the device varies amplitude of an outgoing signal and/or
the threshold of receiving signal will vary and produce phase modulation
resulting in 
jitter.
This is especially a problem for clocks and clock/data relationships.

To determine the amount of decoupling at which ever source frequency you will
need 
to know the amount of power ripple and its frequency, the AM/PM convertion and
the setup and hold times of the receiving device.

Do not forget the DC resistance of the power plane in calculating the your
inductors and tantalum capacitors.

If there is further interest and can send a PPT to individuals.

For those using PLL devices the sensitivities associated with VCO/ICO can be far
greater and require more extensive decoupling. In this case there can be good
reason 
to divorce the 'digital' reference plane from the PLL 'analogue' reference
plane.
-- 
Regards,    __________   James G Roberts
           /___  ____ |  jrobert@xxxxxxxxxxxxxxxxxxxxx
 Jim      __  / /___/ /  jgroberts@xxxxxxxxxx
         / /_/ /---| |   Room: BE436, Hilversum
         \____/    /_/   Tel: +31 35 687 4308 Fax: 5976

MikonCons@xxxxxxx wrote:
> 
> In a message dated 11/24/2002 7:44:59 PM Pacific Standard Time,
> bdewitt@xxxxxxxxxxxxx writes:
> 
> > Maybe someone can explain it, but I've never understood adding _any_
> > additional impedance to a reference plane (call it "ground") connection.
> > It
> > seems I should always be aiming for the common impedance here for reference
> > purposes.  Creating an isolated power to reference current loop does seem
> > to
> > show advantage when both high speed digital and low level analog live on
> > the
> > same board.  Am I missing something?
> 
> Right on target, Brent. Decoupled moats with power input PI-filters and
> ground "bridges" (under the outputs) to the islands created are an effective
> noise isolation mechanism for clocks, but increasing the impedance on the
> ground connection (in my experience) has always increased the SI and EMC
> problems. On the contrary, I have successfully reduced radiated emisions,
> reduced jitter performance,  and cleaned up other SI problems on over 200
> PCBs for ~80 different clients over the past decade by using continuous
> ground planes (along with several other of my tricks of the trade).
> 
> Mike
> 
> Michael L. Conn
> Owner/Principal Consultant
> Mikon Consulting
> Cell: (408)821-9843
> 
>                    *** Serving Your Needs with Technical Excellence ***
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-- 
Regards,    __________   James G Roberts
           /___  ____ |  jrobert@xxxxxxxxxxxxxxxxxxxxx
 Jim      __  / /___/ /  jgroberts@xxxxxxxxxx
         / /_/ /---| |   Room: BE436, Hilversum
         \____/    /_/   Tel: +31 35 687 4308 Fax: 5976
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