FreeLists / si-list / [SI-LIST] AC Termination

["Jim Hanson" <hansonjb@xxxxxxxxxxx>]

In Johnson's test "High-Speed Digital Design", page 237, it states that if
 the duty cycle is 1/2, then across the capacitor the voltage will be 1/2 of
 delta V.

 In "High-Speed Digital System Design" by Hall, Hall, Mc Call, it states on
 page 35 that if an edge is impressed across the capacitor, it will charge
up
 to Vs.

 Johnson states that the time constant should be very large while HHMc
states
 that tau should equal 1 or 2 rise times.

 Also, what about the Xc of the capacitor at the clk frequency?  If Xc is
 small compared to R, then won't it react as a low impedance to gnd?  And
how
 is the value of C chosen to accomplish the following:

 (a) provide the proper time constant and, also
 (b) not have the Xc react as a low impedance to gnd?

 Would appreciate your comments on these.

 Robert Hanson
 Americom Seminars, Inc.

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