FreeLists / si-list / [SI-LIST] Signal Integrity Position

["Bastola, Subas" <subas.bastola@xxxxxxxxx>]

Intel has an immediate opening for contract position, based in Santa
Clara CA, for a signal integrity engineer. This person will be part of a
highly skilled validation platform design team performing board level
design and signal integrity analysis for high performance Intel CPU and
chipsets. 
Responsibilities: 
Deliverables: Signal integrity simulations and analysis of  high speed
interconnects to derive design solution space for board level design and
physical layout. He/she will also be responsible for electrical model
creation of interconnects and creation of SPICE netlist for simulation.
The engineer will work closely with silicon design teams, board
designers and fab house to optimize the system design.  

Skills/Knowledge: 
 
Required: 
* Good understanding of basic SI fundamentals, such as lossy
transmission lines, crosstalk, reflections, etc...
* Real experience performing high speed bus simulations and deriving
design rules for layout
* HSPICE experience is a MUST! Need to be very comfortable with HSPICE
syntax, able to create a SPICE deck from scratch, know how to work with
IBIS and Hspice behavioral or transistor models.
* Good teamwork and organization skills
* Strong verbal and written communication skills

Plus: 
* 3+ years experience in high speed bus simulation
* Good knowledge of FSB bus electricals
* Experience with RLCG parameter extraction tools, such as XFX and
Ansoft
* Experience programming with Perl

Please send your resume directly to me: 
Subas Bastola
subas.bastola@xxxxxxxxx <mailto:subas.bastola@xxxxxxxxx> 
Intel Corporation 


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