Date Index for si-list, 11-2005

[si-list] || [11-2005 Date Index] [11-2005 Thread Index]

[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steve weir
[SI-LIST] Re: High-speed serial data transfer - Hal Murray
[SI-LIST] Re: REPOST: SI Question 1 of 3: "Quiet" lines over split in ground plane - John-Paul Coetzee
[SI-LIST] Re: REPOST: SI Question 3 of 3: Power plane fingers over split in ground plane - John-Paul Coetzee
[SI-LIST] problem - can't simulate Spice in Hyperlynx - Roy M
[SI-LIST] Re: problem - can't simulate Spice in Hyperlynx - Dan Bostan
[SI-LIST] Re: problem - can't simulate Spice in Hyperlynx - Mcgrath, Christopher
[SI-LIST] Re: problem - can't simulate Spice in Hyperlynx - Hargin, Bill
[SI-LIST] Job Opening - Joiner Bennett-rxmn60
[SI-LIST] Modeling questions - TerenceHsieh
[SI-LIST] Question on EMI radiated power - Doug Brooks
[SI-LIST] Re: Question on EMI radiated power - Scott McMorrow
[SI-LIST] Re: Question on EMI radiated power - Andrew Burnside
[SI-LIST] Re: Question on EMI radiated power - Andrew Ingraham
[SI-LIST] Transition time constraint for TSMC 0.18 design - Unni Gangadharan
[SI-LIST] Re: Question on EMI radiated power - Ihsan Erdin
[SI-LIST] Si and EMC troubleshooting method - Doug Smith
[SI-LIST] Re: TEK or ex-HP, that is the question - Ludvik Kindl
[SI-LIST] Re: Question on EMI radiated power - Charles Hill
[SI-LIST] Re: Question on EMI radiated power - Andrew Burnside
[SI-LIST] Re: Question on EMI radiated power - Charles Hill
[SI-LIST] Re: Question on EMI radiated power - Dr. Edward P. Sayre
[SI-LIST] Re: Transition time constraint for TSMC 0.18 design - Lynne D. Green
[SI-LIST] ESR too low? - Fasig, Jonathan L.
[SI-LIST] IEEE EMCS Santa Clara Valley (SCV) Chapter meeting- November 8, 2005 - Ahmad Fallah
[SI-LIST] Re: ESR too low? - Derek Walton
[SI-LIST] Re: ESR too low? - Calvo, Oscar A (FL51)
[SI-LIST] Re: ESR too low? - Calvo, Oscar A (FL51)
[SI-LIST] Re: ESR too low? - Henson, Bradley S
[SI-LIST] Re: ESR too low? - John Matthews
[SI-LIST] Asian IBIS Summit Fifth Announcement - Bob Ross
[SI-LIST] Re: ESR too low? - Russel Hughes
[SI-LIST] Re: TEK or ex-HP, that is the question; or FLY WITH THE SIGNAL - Ludvik Kindl
[SI-LIST] Jitter Analysis Using Spice. - Sanchayan Sinha
[SI-LIST] Re: ESR too low? - Russel Hughes
[SI-LIST] Re: ESR too low? - Bob McNamara
[SI-LIST] Re: Jitter Analysis Using Spice. - Pratt, Gary
[SI-LIST] Re: ESR too low? - Mikhail Matusov
[SI-LIST] Re: ESR too low? - Bob McNamara
[SI-LIST] Re: ESR too low? - Calvo, Oscar A (FL51)
[SI-LIST] Re: ESR too low? - Henson, Bradley S
[SI-LIST] Re: ESR too low? - Calvo, Oscar A (FL51)
[SI-LIST] Re: ESR too low? - Henson, Bradley S
[SI-LIST] Re: ESR too low? - Dimiter Popoff
[SI-LIST] Re: ESR too low? - steve weir
[SI-LIST] PCI/PCIX minimum lenghts? - Anders Frederiksen
[SI-LIST] Re: ESR too low? - Dimiter Popoff
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Andrew Ingraham
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Dr. Edward P. Sayre
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Mcgrath, Christopher
[SI-LIST] Looking for SI job in Southern California - ma mu
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Nitin Sood
[SI-LIST] Signal Integrity Position - Bastola, Subas
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Andrew Ingraham
[SI-LIST] BGA Fan Out - Fred Townsend
[SI-LIST] Re: BGA Fan Out - Dimiter Popoff
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Dr. Edward P. Sayre
[SI-LIST] Re: BGA Fan Out - Dr. Edward P. Sayre
[SI-LIST] VNA choice - Bleu, Carlo
[SI-LIST] Re: PCI/PCIX minimum lenghts? - Anders Frederiksen
[SI-LIST] Resistor packs, SI issues? - Anders Frederiksen
[SI-LIST] Single ended s-parameters of a differential mircostrip line - pritchard, jason
[SI-LIST] Re: Single ended s-parameters of a differential mircostrip line - Loyer, Jeff
[SI-LIST] Re: Resistor packs, SI issues? - Dunbar, Tony
[SI-LIST] Re: Resistor packs, SI issues? - Mike Greim
[SI-LIST] Re: Resistor packs, SI issues? - Anders Frederiksen
[SI-LIST] Re: Resistor packs, SI issues? - Henson, Bradley S
[SI-LIST] Re: Single ended s-parameters of a differential mircost rip line - pritchard, jason
[SI-LIST] Re: Single ended s-parameters of a differential mir cost rip line - Dan Piscotty
[SI-LIST] Modeling questions - Yevgeniy Mayevskiy
[SI-LIST] Plastic solder balls - Jon Keeble
[SI-LIST] PCI-E, Zdiff and Er - Roy M
[SI-LIST] current density - TerenceHsieh
[SI-LIST] Antw: current density - Robert Nowak
[SI-LIST] Re: PCI-E, Zdiff and Er - Luc Durand
[SI-LIST] Re: Antw: current density - Grasso, Charles
[SI-LIST] Re: PCI-E, Zdiff and Er - Mike Heimlich
[SI-LIST] Re: Single ended s-parameters of a differential mircost rip line - Mike Heimlich
[SI-LIST] Copper atom density - Doug Brooks
[SI-LIST] Re: Copper atom density - Ed Sayre III
[SI-LIST] Re: Copper atom density - art_porter
[SI-LIST] Re: Copper atom density - HaroldLSJ
[SI-LIST] Query on termination techniques - Abdulrahman Rafiq
[SI-LIST] Re: Plastic solder balls - Kai Keskinen
[SI-LIST] Re: Copper atom density - Paul Levin
[SI-LIST] Test our 10 GHz frequency divider and keep the prototype unit? - Steven Kan
[SI-LIST] Re: Copper atom density - HaroldLSJ
[SI-LIST] Asian IBIS Summit Sixth Announcement - Bob Ross
[SI-LIST] SDRAM read problem - Qiu, Peter (GE Consumer & Industrial, consultant)
[SI-LIST] Immediate Package Characterization Engineer Opening at Xilinx San Jose - Ray Anderson
[SI-LIST] Re: Copper atom density - Grasso, Charles
[SI-LIST] European IBIS Summit At DATe 2006 - First Call for Paper/Call for Participation - Ralf Bruening
[SI-LIST] RTL8100BL and MINI PCI 124 ibis models - race
[SI-LIST] Spice (scope rules) syntax of parameter passing in .subckt - jan . vercammen1
[SI-LIST] Re: Test our 10 GHz frequency divider and keep the prototype unit?--SOLD - Steven Kan
[SI-LIST] Trace Width - Qazi Arif Iqbal
[SI-LIST] Re: Trace Width - art_porter
[SI-LIST] Re: SDRAM read problem - Calvo, Oscar A (FL51)
[SI-LIST] Re: SDRAM read problem - MSumesh
[SI-LIST] HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - mystery guy
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Kai Keskinen
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Ray Anderson
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Grasso, Charles
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - mystery guy
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Tom Biggs
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Todd Westerhoff (twesterh)
[SI-LIST] Two SDRAM ICs - Jai Dhar
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - Julian Ferry
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Abdulrahman Rafiq
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - Scott McMorrow
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - steve weir
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - Andrew Burnside
[SI-LIST] buffer selection - Kamran Azizi
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Board Level Simulation < 400 MT/s??? - Tom Biggs
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - James Freeman
[SI-LIST] 50 ohms cable model - Truong, Gerald (Space Technology)
[SI-LIST] Re: Caution Spam:Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - Ingo Kupper
[SI-LIST] Re: 50 ohms cable model - art_porter
[SI-LIST] Re: 50 ohms cable model - steve weir
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar d Level Simulation < 400 MT/s??? - Todd Westerhoff (twesterh)
[SI-LIST] Re: 50 ohms cable model - Ed Sayre III
[SI-LIST] Re: buffer selection - ariazi
[SI-LIST] Raw cable construction and twisted pairs - Mike Haff
[SI-LIST] Re: Raw cable construction and twisted pairs - steve weir
[SI-LIST] Re: buffer selection - Vivek Chandra
[SI-LIST] query please - praveen kumar
[SI-LIST] the right way to choose the scrambler - Guasti Giovanni
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar - Mike Ventham
[SI-LIST] Re: the right way to choose the scrambler - steve weir
[SI-LIST] Re: 50 ohms cable model - Andrew Ingraham
[SI-LIST] Re: query please - Kai Keskinen
[SI-LIST] query please - praveen kumar
[SI-LIST] query please - praveen kumar
[SI-LIST] HSPICE **error**: unknown data card: - Joe Miller
[SI-LIST] Re: the right way to choose the scrambler - Dave Instone
[SI-LIST] Re: Two SDRAM ICs - msharpes
[SI-LIST] Re: Plastic solder balls - Roger . Delbue
[SI-LIST] Re: HELP!! SpecctraQuest is GOOD/BAD Tool for Boar - Julian Ferry
[SI-LIST] Effective impedance of a uniformly loaded bus - Edi Fraiman
[SI-LIST] EMC test - Bleu, Carlo
[SI-LIST] Re: HSPICE **error**: unknown data card: - Clewell, Craig
[SI-LIST] Re: HSPICE **error**: unknown data card: - Andrew Ingraham
[SI-LIST] Re: Effective impedance of a uniformly loaded bus - steve weir
[SI-LIST] Re: Effective impedance of a uniformly loaded bus - Edi Fraiman
[SI-LIST] Re: Effective impedance of a uniformly loaded bus - Dr. Howard Johnson
[SI-LIST] Bit pattern for high speed serial link simulation - Perry Qu
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Zabinski, Patrick J.
[SI-LIST] Re: Bit pattern for high speed serial link simulation - steve weir
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Perry Qu
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Perry Qu
[SI-LIST] Re: Effective impedance of a uniformly loaded bus - steve weir
[SI-LIST] Re: Effective impedance of a uniformly loaded bus - Edi Fraiman
[SI-LIST] PSpice to HSpice - nrpatel
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Pratt, Gary
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Perry Qu
[SI-LIST] NEXT and FEXT: Question on relative levels - Grasso, Charles
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Pratt, Gary
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Scott McMorrow
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Lee Ritchey
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Pratt, Gary
[SI-LIST] Job Opening Texas Instruments - Dalla, TX - Peter Harper
[SI-LIST] unsubscribe - John . Whalen
[SI-LIST] Agenda - Asian IBIS Summit - Bob Ross
[SI-LIST] 'unsubscribe' - John . Whalen
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Chris Cheng
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Muranyi, Arpad
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Pratt, Gary
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Perry Qu
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Cortex.Chen
[SI-LIST] 回复： NEXT and FEXT: Question on relative levels - Yuming Cheng
[SI-LIST] Time domain AMS-SI tools - Mark Burford
[SI-LIST] Re: Time domain AMS-SI tools - Andrew Burnside
[SI-LIST] Re: Time domain AMS-SI tools - Mark Burford
[SI-LIST] DC resistance of the Power Supply on PCB - Zhangkun
[SI-LIST] Re: DC resistance of the Power Supply on PCB - Andrew Ingraham
[SI-LIST] Re: DC resistance of the Power Supply on PCB - zhangkun 29902
[SI-LIST] Re: Bit pattern for high speed serial link simulation - Ken Willis
[SI-LIST] Re: DC resistance of the Power Supply on PCB - Andrew Ingraham
[SI-LIST] Re: Time domain AMS-SI tools - Mike Heimlich
[SI-LIST] Re: ??: NEXT and FEXT: Question on relative levels - Aubrey_Sparkman
[SI-LIST] Re: ??: NEXT and FEXT: Question on relative levels - Grasso, Charles
[SI-LIST] Immediate Package Characterization Engineer Opening at Xilinx San Jose - Ray Anderson
[SI-LIST] Re: Time domain AMS-SI tools - Ihsan Erdin
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Dr. Howard Johnson
[SI-LIST] Re: DC resistance of the Power Supply on PCB - zhangkun 29902
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Dr. Howard Johnson
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Dr. Howard Johnson
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Lee Ritchey
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Scott McMorrow
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - John Ellis
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Chris Cheng
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - John Ellis
[SI-LIST] Re: NEXT and FEXT: Question on relative levels - Lee Ritchey
[SI-LIST] SI Job Opening - Extreme Networks - Nitin Bhandari