FreeLists / si-list / [SI-LIST] Sr. level Career Opportunity at Altera

["George Carlson" <gcarlson@xxxxxxx>]

As a Design Engineer, MTS, you will be a member of a team that supports the
high-speed interfaces in ALTERA FPGAs. You will work closely with the
customers to assist them in resolving signal integrity issues with
high-speed interfaces in ALTERA FPGAs.  You will be responsible for creation
and improvement of technical documentation to assist field and customers in
designing with ALTERA devices and for the check out of the high speed
interfaces of the device prior to launch.  You will perform system level
characterization of devices to check for compliance to relevant standards.
You will be responsible for providing training on complex technical concepts
to the field.  You will provide inputs in defining future product
requirements

Qualifications include a BSEE or equivalent with a minimum of 8 years of
design or applications experience. Experience in the following areas is
required:
experience with Gigabit/Multi-Gigabit SERDES devices 
extensive experience with SPICE/IBIS Simulations and Modeling 
signal integrity analysis 
high-speed board design/bring-up 
strong knowledge of multi-gigabit backplane interconnects 
able to analyze problems, identify root causes and propose solutions 
able to work individually as well as part of a team 
technically creative with the ability to manage multiple tasks efficiently 
excellent communication skills 
MSEE preferred 
experience with VHDL/Verilog and designing with FPGAs preferred 
knowledge of communication protocols (Ethernet, Fibre Channel, PCI-Express)
preferred

Please send resumes to gcarlson@xxxxxxx

George Carlson, CPC
george carlson, cpc, inc.
(218) 388-9969
gcarlson@xxxxxxx
http://www.tqr.com/


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