FreeLists / si-list / [SI-LIST] Paksi-E in BGA Substrate Design?

[Erhan Kaya <erhan.kaya@xxxxxxxxxx>]

Hi all,

First of all, I am pretty happy to be able to reach so many users having
questions and tasks in their minds very similar to mine in this newsgroup.
And I really don't know where to start from, but here's the first question:

Is anyone out there using Paksi-E during the package design process of BGAs
to function in the system interconnect field where PCI, u-processor, memory
buses exist and switch with a 500MHz range clock and a 1Gb/s data rate, also
looking into diff pair designs, trying to meet timing budgets?

(Believe me, my plan was only "one" question)

Erhan Kaya
Package Engineer


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages 
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu