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Thread Index for si-list, 10-2005

[si-list] || [10-2005 Date Index] [10-2005 Thread Index]

  1. [SI-LIST] ROHS Compliance, Boopathy J.
  2. [SI-LIST] Jitter Webcast -- Presented jointly by Xilinx and Signal Consulting, Mark Alexander
  3. [SI-LIST] Re: Jitter Webcast -- Presented jointly by Xilinx and Signal Consulting, Kindl, Ludvikx
  4. [SI-LIST] controlling varialbles in test setups, Doug Smith
  5. [SI-LIST] Problems with IBIS2SPICE, Christopher R. Johnson
  6. [SI-LIST] s-parameter in cadence, Kamran Azizi
  7. [SI-LIST] Re: s-parameter in cadence, Ray Anderson
  8. [SI-LIST] Differential Pair Characteristic Impedance Tradeoffs, melvin bowman
  9. [SI-LIST] FPGA output resistance question, Paul Mobbs
  10. [SI-LIST] High Speed IO Group Job Openings at Altera., Vipul Badoni
  11. [SI-LIST] Open traces: how to analyze, Gaurav MATHUR
  12. [SI-LIST] Recall: s-parameter in cadence, Silqun Leung
  13. [SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs, Carrier, Patrick
  14. [SI-LIST] Undershoot on a cPCI Bus, Fields, Brian
  15. [SI-LIST] Re: Undershoot on a cPCI Bus, steve weir
  16. [SI-LIST] package S-parameters in IBIS, k palusa
  17. [SI-LIST] Re: package S-parameters in IBIS, Beal, Weston
  18. [SI-LIST] Asian IBIS Summit Third Announcement, Bob Ross
  19. [SI-LIST] IV and VT data mismatch, seshadri.kirankumar
  20. [SI-LIST] spice2IBIS, k palusa
  21. [SI-LIST] Re: spice2IBIS, Hargin, Bill
  22. [SI-LIST] Need help with ibis model for Spansion - AM29DL800B, an . le
  23. [SI-LIST] pcb stray capacitance, Prathibha
  24. [SI-LIST] In HFSS V9.2, µ¨Å¸¼Ò³â
  25. [SI-LIST] Transmsision lines, Leonard Alexman
  26. [SI-LIST] Re: Problem with HFSS 9, Mike Heimlich
  27. [SI-LIST] Re: Transmsision lines, Mike Heimlich
  28. [SI-LIST] Transmission lines and why there are reflections, Eric Bogatin
  29. [SI-LIST] Re: Transmission lines and why there are reflections, jan . vercammen1
  30. [SI-LIST] Bathtub curve tool or script, Ed Sayre III
  31. [SI-LIST] IBIS question: Test Load for Differential Clock, Bo Yu
  32. [SI-LIST] Re: IBIS question: Test Load for Differential Clock, 델타소년
  33. [SI-LIST] IBIS model Tr accuracy, Peterson, James F (FL51)
  34. [SI-LIST] Re: IBIS model Tr accuracy, Aubrey_Sparkman
  35. [SI-LIST] Oscilloscopes Question, Silva, Benjamin P
  36. [SI-LIST] Re: Transmission lines reflections again, Muranyi, Arpad
  37. [SI-LIST] System-Level Power Integrity - Free Online Seminar hosted by Sigrity, Inc. with Dr. Howard Johnson (Nov 9, 2005), Teo Yatman
  38. [SI-LIST] TCOmin < external buffer delay, Yuming Cheng
  39. [SI-LIST] TEK or ex-HP, that is the question, Ludvik Kindl
  40. [SI-LIST] Re: TCOmin < external buffer delay, preetesh rathod
  41. [SI-LIST] Power plane coupling, Ludovic Levieil
  42. [SI-LIST] Re: Multimedia Topics, Todd Westerhoff (twesterh)
  43. [SI-LIST] Job Opening - SI Contractor Position, Ma, Samuel E
  44. [SI-LIST] Re: TEK or ex-HP, that is the question, Tabatchnick, Justin
  45. [SI-LIST] IBIS for DDR2 DIMM, Supratim
  46. [SI-LIST] SSTL/DDR series termination, Brad5m
  47. [SI-LIST] Microstrip Loss Correlation, Christopher . Crowley
  48. [SI-LIST] Re: Microstrip Loss Correlation, Mark Burford
  49. [SI-LIST] Re: Power plane coupling, Larry Smith
  50. [SI-LIST] Re: Displaying eye pattern in an oscilloscope?, Chris Cheng
  51. [SI-LIST] Re: [SI-LIST Microstrip Loss Correlation: Need to look at TDR, hbarnes_2298
  52. [SI-LIST] Re: SSTL/DDR series termination, Brad5m
  53. [SI-LIST] Asian IBIS Summit Fourth Announcement, Bob Ross
  54. [SI-LIST] which test i have to do?, jagaveer25
  55. [SI-LIST] High Speed connector, Gaurav MATHUR
  56. [SI-LIST] Re: About EMI/EMC book, Gopalakrishnan Sethuraj
  57. [SI-LIST] Re: Common-mode return path for differential signals., Doug Hopperstad
  58. [SI-LIST] Re: Common-mode return path for differential signals., steve weir
  59. [SI-LIST] new number, molly xu
  60. [SI-LIST] clc001 and lvds, Bernard Esteban
  61. [SI-LIST] Re: clc001 and lvds, Truong, Gerald (Space Technology)
  62. [SI-LIST] Signal Integrity workshop at CST, Fabrizio . Zanella
  63. [SI-LIST] quenching ugly spikes?, Henrik Gild
  64. [SI-LIST] Re: quenching ugly spikes?, Truong, Gerald (Space Technology)
  65. [SI-LIST] SI Question 3 of 3: Power plane fingers over split in ground plane, John-Paul Coetzee
  66. [SI-LIST] SI Question 2 of 3: Differential clock lines over split in ground plane, John-Paul Coetzee
  67. [SI-LIST] SI Question 1 of 3: "Quiet" lines over split in ground plane, John-Paul Coetzee
  68. [SI-LIST] Can L12 ever exceed L1 or L2 ??, Ray Anderson
  69. [SI-LIST] Re: Can L12 ever exceed L1 or L2 ??, Singh, Siddharth
  70. [SI-LIST] I'm Back, Rich
  71. [SI-LIST] REPOST: SI Question 1 of 3: "Quiet" lines over split in ground plane, John-Paul Coetzee
  72. [SI-LIST] REPOST: SI Question 2 of 3: Differential clock lines over split in ground plane, John-Paul Coetzee
  73. [SI-LIST] REPOST: SI Question 3 of 3: Power plane fingers over split in ground plane, John-Paul Coetzee
  74. [SI-LIST] Signal Integrity Intern at Cisco's RTP, NC facility:, Stephen Scearce (sscearce)
  75. [SI-LIST] Re: REPOST: SI Question 1 of 3: "Quiet" lines over split in ground plane, steve weir
  76. [SI-LIST] Re: REPOST: SI Question 2 of 3: Differential clock lines over split in ground plane, steve weir
  77. [SI-LIST] Re: REPOST: SI Question 3 of 3: Power plane fingers over split in ground plane, steve weir
  78. [SI-LIST] Openning in Marvell Storage Networking Group, Wei Zhou
  79. [SI-LIST] High-speed serial data transfer, Yanfang Wang



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