Date Index for si-list, 10-2005

[si-list] || [10-2005 Date Index] [10-2005 Thread Index]

[SI-LIST] ROHS Compliance - Boopathy J.
[SI-LIST] Re: ROHS Compliance - Kai Keskinen
[SI-LIST] Jitter Webcast -- Presented jointly by Xilinx and Signal Consulting - Mark Alexander
[SI-LIST] Re: Jitter Webcast -- Presented jointly by Xilinx and Signal Consulting - Kindl, Ludvikx
[SI-LIST] Re: Jitter Webcast -- Presented jointly by Xilinx and Signal Consulting - Mark Alexander
[SI-LIST] Santa Clara Valley (SCV) EMC Chapter Meeting--11 October, 2005 - Ahmad Fallah
[SI-LIST] controlling varialbles in test setups - Doug Smith
[SI-LIST] Problems with IBIS2SPICE - Christopher R. Johnson
[SI-LIST] s-parameter in cadence - Kamran Azizi
[SI-LIST] Re: s-parameter in cadence - Lynne D. Green
[SI-LIST] Re: s-parameter in cadence - Scott McMorrow
[SI-LIST] Re: s-parameter in cadence - Ray Anderson
[SI-LIST] Re: s-parameter in cadence - Lynne D. Green
[SI-LIST] Re: s-parameter in cadence - Dennis Han
[SI-LIST] Differential Pair Characteristic Impedance Tradeoffs - melvin bowman
[SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs - Dennis Han
[SI-LIST] FPGA output resistance question - Paul Mobbs
[SI-LIST] Re: FPGA output resistance question - steve weir
[SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs - Julia Nekrylova
[SI-LIST] High Speed IO Group Job Openings at Altera. - Vipul Badoni
[SI-LIST] Open traces: how to analyze - Gaurav MATHUR
[SI-LIST] Re: Open traces: how to analyze - Istvan Novak
[SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs - Dennis Han
[SI-LIST] Re: s-parameter in cadence - Silqun Leung
[SI-LIST] Recall: s-parameter in cadence - Silqun Leung
[SI-LIST] Re: s-parameter in cadence - Silqun Leung
[SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs - Carrier, Patrick
[SI-LIST] Undershoot on a cPCI Bus - Fields, Brian
[SI-LIST] Re: Undershoot on a cPCI Bus - steve weir
[SI-LIST] Re: FYI: posted Excel illustration file for DesignCon East 2005 presentation - Istvan Novak
[SI-LIST] Re: s-parameter in cadence - Mike Kang
[SI-LIST] Re: Undershoot on a cPCI Bus - Dr. Edward P. Sayre
[SI-LIST] package S-parameters in IBIS - k palusa
[SI-LIST] Re: package S-parameters in IBIS - Lynne D. Green
[SI-LIST] Re: package S-parameters in IBIS - Beal, Weston
[SI-LIST] Asian IBIS Summit Third Announcement - Bob Ross
[SI-LIST] IV and VT data mismatch - seshadri.kirankumar
[SI-LIST] spice2IBIS - k palusa
[SI-LIST] Re: spice2IBIS - Hargin, Bill
[SI-LIST] Re: spice2IBIS - k palusa
[SI-LIST] Re: s-parameter in cadence - Mark Smith
[SI-LIST] Need help with ibis model for Spansion - AM29DL800B - an . le
[SI-LIST] pcb stray capacitance - Prathibha
[SI-LIST] In HFSS V9.2 - µ¨Å¸¼Ò³â
[SI-LIST] Re: pcb stray capacitance - Kai Keskinen
[SI-LIST] Problem with HFSS 9 - kundanchand chand
[SI-LIST] Transmsision lines - Leonard Alexman
[SI-LIST] Re: Problem with HFSS 9 - Mike Heimlich
[SI-LIST] Re: Transmsision lines - Mike Heimlich
[SI-LIST] Re: Transmsision lines - Luciano Boglione
[SI-LIST] Re: Problem with HFSS 9 - kundanchand chand
[SI-LIST] Re: Problem with HFSS 9 - Tammy Zinger
[SI-LIST] Re: Transmsision lines - Bi Han
[SI-LIST] Re: Transmsision lines - ray jiang
[SI-LIST] Re: Problem with HFSS 9 - Mike Heimlich
[SI-LIST] Transmission lines and why there are reflections - Eric Bogatin
[SI-LIST] Re: Transmission lines and why there are reflections - Leonard Alexman
[SI-LIST] Re: Transmsision lines - Viaene, Tim
[SI-LIST] Re: Transmission lines and why there are reflections - jan . vercammen1
[SI-LIST] Re: Problem with HFSS 9 - Ming Tsai
[SI-LIST] Re: spice2IBIS - Lynne D. Green
[SI-LIST] Bathtub curve tool or script - Ed Sayre III
[SI-LIST] IBIS question: Test Load for Differential Clock - Bo Yu
[SI-LIST] Re: IBIS question: Test Load for Differential Clock - 델타소년
[SI-LIST] Re: IBIS question: Test Load for Differential Clock - Bo Yu
[SI-LIST] Re: IBIS question: Test Load for Differential Clock - 델타소년
[SI-LIST] IBIS model Tr accuracy - Peterson, James F (FL51)
[SI-LIST] Re: IBIS model Tr accuracy - Aubrey_Sparkman
[SI-LIST] Signal Integrity Opportunities in Cisco India - satish pratapneni
[SI-LIST] Re: IBIS model Tr accuracy - Andrew Ingraham
[SI-LIST] Re: IBIS model Tr accuracy - Peterson, James F (FL51)
[SI-LIST] Re: IBIS model Tr accuracy - Henson, Bradley S
[SI-LIST] Re: IBIS model Tr accuracy - Peterson, James F (FL51)
[SI-LIST] Re: IBIS model Tr accuracy - steve weir
[SI-LIST] Re: IBIS model Tr accuracy - Lynne D. Green
[SI-LIST] Oscilloscopes Question - Silva, Benjamin P
[SI-LIST] Transmission lines reflections again - Leonard Alexman
[SI-LIST] Re: Transmission lines reflections again - Scott McMorrow
[SI-LIST] Re: Transmission lines reflections again - Muranyi, Arpad
[SI-LIST] Re: Transmission lines reflections again - Yafei Bi
[SI-LIST] Re: Transmission lines reflections again - Loyer, Jeff
[SI-LIST] Re: Transmission lines reflections again - Tom Biggs
[SI-LIST] System-Level Power Integrity - Free Online Seminar hosted by Sigrity, Inc. with Dr. Howard Johnson (Nov 9, 2005) - Teo Yatman
[SI-LIST] System-Level Power Integrity - Free Online Seminar hosted by Sigrity, Inc. with Dr. Howard Johnson (Nov 9, 2005) - Teo Yatman
[SI-LIST] TCOmin < external buffer delay - Yuming Cheng
[SI-LIST] TEK or ex-HP, that is the question - Ludvik Kindl
[SI-LIST] Re: TCOmin < external buffer delay - preetesh rathod
[SI-LIST] Multimedia Topics - V.Subramaniam
[SI-LIST] Power plane coupling - Ludovic Levieil
[SI-LIST] Re: TCOmin < external buffer delay - Peterson, James F (FL51)
[SI-LIST] Re: Transmission lines reflections again - Andrew Ingraham
[SI-LIST] Re: TCOmin < external buffer delay - Andrew Ingraham
[SI-LIST] Re: Multimedia Topics - Tom Dagostino
[SI-LIST] Re: Multimedia Topics - Todd Westerhoff (twesterh)
[SI-LIST] Job Opening - SI Contractor Position - Ma, Samuel E
[SI-LIST] Re: Transmission lines reflections again - Todd Westerhoff (twesterh)
[SI-LIST] Re: Transmission lines reflections again - Hargin, Bill
[SI-LIST] Re: Transmission lines reflections again - steve weir
[SI-LIST] Re: TEK or ex-HP, that is the question - Tabatchnick, Justin
[SI-LIST] Re: TCOmin < external buffer delay - Kai Keskinen
[SI-LIST] Re: Power plane coupling - Istvan Novak
[SI-LIST] Re: TCOmin < external buffer delay - Ihsan Erdin
[SI-LIST] Re: TCOmin < external buffer delay - steve weir
[SI-LIST] IBIS for DDR2 DIMM - Supratim
[SI-LIST] Re: TCOmin < external buffer delay - Ihsan Erdin
[SI-LIST] Re: TCOmin < external buffer delay - Ihsan Erdin
[SI-LIST] Re: IBIS for DDR2 DIMM - Ihsan Erdin
[SI-LIST] Re: TCOmin < external buffer delay - Ken Willis
[SI-LIST] SSTL/DDR series termination - Brad5m
[SI-LIST] Microstrip Loss Correlation - Christopher . Crowley
[SI-LIST] Re: SSTL/DDR series termination - Ravinder . Ajmani
[SI-LIST] Re: TCOmin < external buffer delay - Beal, Weston
[SI-LIST] Re: Microstrip Loss Correlation - Mark Burford
[SI-LIST] Re: Microstrip Loss Correlation - Christopher . Crowley
[SI-LIST] Re: SSTL/DDR series termination - steve weir
[SI-LIST] Re: Power plane coupling - Larry Smith
[SI-LIST] Re: Microstrip Loss Correlation - Tom Dagostino
[SI-LIST] Re: IBIS for DDR2 DIMM - ariazi
[SI-LIST] Re: SSTL/DDR series termination - Ravinder . Ajmani
[SI-LIST] Re: Power plane coupling - Mcgrath, Christopher
[SI-LIST] Re: Microstrip Loss Correlation - bratfest
[SI-LIST] Re: Power plane coupling - steve weir
[SI-LIST] Re: Power plane coupling - Mcgrath, Christopher
[SI-LIST] Displaying eye pattern in an oscilloscope? - Rep
[SI-LIST] Re: SSTL/DDR series termination - Ihsan Erdin
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - steve weir
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - Chris Cheng
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - Ihsan Erdin
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - steve weir
[SI-LIST] Re: SSTL/DDR series termination - raj singh
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - Ihsan Erdin
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - steve weir
[SI-LIST] Re: Displaying eye pattern in an oscilloscope? - Chris Cheng
[SI-LIST] Re: Power plane coupling - Zhangkun
[SI-LIST] Re: [SI-LIST Microstrip Loss Correlation: Need to look at TDR - hbarnes_2298
[SI-LIST] Re: SSTL/DDR series termination - Brad5m
[SI-LIST] Re: SSTL/DDR series termination - Novak David (TTE)
[SI-LIST] About EMI/EMC book - Naren
[SI-LIST] Asian IBIS Summit Fourth Announcement - Bob Ross
[SI-LIST] which test i have to do? - jagaveer25
[SI-LIST] High Speed connector - Gaurav MATHUR
[SI-LIST] Re: About EMI/EMC book - Gopalakrishnan Sethuraj
[SI-LIST] Re: About EMI/EMC book - SreejaPillai
[SI-LIST] Re: Power plane coupling - Istvan Novak
[SI-LIST] Re: About EMI/EMC book - POWELL, DOUG
[SI-LIST] Re: About EMI/EMC book - Paul Gingras
[SI-LIST] Re: which test i have to do? - Kai Keskinen
[SI-LIST] Re: Power plane coupling - Larry Smith
[SI-LIST] Re: Power plane coupling - steve weir
[SI-LIST] Re: Power plane coupling - Larry Smith
[SI-LIST] Re: Power plane coupling - steve weir
[SI-LIST] Re: Common-mode return path for differential signals. - Doug Hopperstad
[SI-LIST] Re: Common-mode return path for differential signals. - steve weir
[SI-LIST] Re: Common-mode return path for differential signals. - Mirmak, Michael
[SI-LIST] new number - molly xu
[SI-LIST] clc001 and lvds - Bernard Esteban
[SI-LIST] Re: clc001 and lvds - Truong, Gerald (Space Technology)
[SI-LIST] Signal Integrity workshop at CST - Fabrizio . Zanella
[SI-LIST] quenching ugly spikes? - Henrik Gild
[SI-LIST] Re: quenching ugly spikes? - Truong, Gerald (Space Technology)
[SI-LIST] Re: quenching ugly spikes? - steve weir
[SI-LIST] Re: clc001 and lvds - Bernard Esteban
[SI-LIST] Re: quenching ugly spikes? - Grist, Robert
[SI-LIST] Re: Common-mode return path for differential signals. - Ihsan Erdin
[SI-LIST] SI Question 3 of 3: Power plane fingers over split in ground plane - John-Paul Coetzee
[SI-LIST] SI Question 2 of 3: Differential clock lines over split in ground plane - John-Paul Coetzee
[SI-LIST] SI Question 1 of 3: "Quiet" lines over split in ground plane - John-Paul Coetzee
[SI-LIST] Can L12 ever exceed L1 or L2 ?? - Ray Anderson
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Singh, Siddharth
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steve weir
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Qazi Arif Iqbal
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Ihsan Erdin
[SI-LIST] Can L12 ever exceed L1 or L2 ?? - Eric Bogatin
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Zhou, Xingling (Mick)
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steve weir
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Andrew Ingraham
[SI-LIST] I'm Back - Rich
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steve weir
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Chan, Edward K
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Ihsan Erdin
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steve weir
[SI-LIST] REPOST: SI Question 1 of 3: "Quiet" lines over split in ground plane - John-Paul Coetzee
[SI-LIST] REPOST: SI Question 2 of 3: Differential clock lines over split in ground plane - John-Paul Coetzee
[SI-LIST] REPOST: SI Question 3 of 3: Power plane fingers over split in ground plane - John-Paul Coetzee
[SI-LIST] Signal Integrity Intern at Cisco's RTP, NC facility: - Stephen Scearce (sscearce)
[SI-LIST] Re: REPOST: SI Question 1 of 3: "Quiet" lines over split in ground plane - steve weir
[SI-LIST] Re: REPOST: SI Question 2 of 3: Differential clock lines over split in ground plane - steve weir
[SI-LIST] Re: REPOST: SI Question 3 of 3: Power plane fingers over split in ground plane - steve weir
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - steven . d . corey
[SI-LIST] Openning in Marvell Storage Networking Group - Wei Zhou
[SI-LIST] High-speed serial data transfer - Yanfang Wang
[SI-LIST] Re: Can L12 ever exceed L1 or L2 ?? - Ihsan Erdin