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[SI-LIST] Re: Serpentine Traces

  • From: "Jack W.C. Lin" <JackWCLin@xxxxxxxxxxxx>
  • To: 'Rick Brooks' <ricbrook@xxxxxxxxxxx>
  • Date: Wed, 9 Oct 2002 09:49:40 +0800
Hi Rick:
Thanks for your attention. I list answers in the following:
(1) in XTK
(2)same driver model
(3)same load model
(4)total trace length on PCB is around 6500mils
(5)rise/fall time 1.05ns
(6)microstrip structure
I am doing some experiments about serpentine routing. If I straighten =
the
serpentine trace with same length, DQ and DQS almost the same delay. =
For
your reference! Thanks

Jack=20

-----Original Message-----
From: Rick Brooks [mailto:ricbrook@xxxxxxxxxxx]=20
Sent: Wednesday, October 09, 2002 9:29 AM
To: Jack W.C. Lin
Subject: Re: [SI-LIST] Re: Serpentine Traces


Jack,
you did not mention a few things:
1) is this XTK simulation only, or measurements?
2) are the drivers the same for DQ and DQS?
3) are the loads the same for DQ and DQS?
4) what is the total trace length
5) what is the edge rate
6) microstrip/stripline combination?

These large time differences would seem to be due to driver and/or load =

differences, and not the trace length
or serpentine configuration.

just some quick thoughts....
- Rick Brooks








At 08:45 AM 10/9/2002 +0800, you wrote:
>Dear all:
>As you know that serpentine routing will take shorter time to =
propagate=20
>signal from source to load than a straight line. But I found an=20
>interesting result from my case. In my DDR design,said some certain=20
>group. DQ length is almost the same with DQS,DQ did a serious=20
>serpentine routing but DQS a little. In our common sense,the flight=20
>time between them will differ a little. But I found that they differ=20
>too much,around 1.4 ns. DQS leading DQ? An unbelevable result. I found =

>that DQ take 45 degree bending for serpentine, and DQS take ARC=20
>serpentine. If I modified all serpentine of DQ as ARC serpentine with=20
>same length, the flight time difference with DQS reduce to around=20
>0.8ns. It's improved but not good enough. (my case is=20
>DDR333,flight_max=3D0.45ns,SIM tool is XTK). Is there any one =
experienced=20
>the similiar case? Any suggestion is highly appreciated.
>PS: I had delete all net but leave this problem DQ and related DQS, no
other
>extra coupling but themself due to serpentine routing.
>Jack
>Jack W.C. Lin
>CAD&EMC Team in aopen In.
>
>-----=AD=EC=A9l=B0T=AE=A7-----
>     =B1H=A5=F3=AA=CC: "Robert Haller" <rhaller@xxxxxxxxxx>
>     =B1H=A5=F3=A4=E9=B4=C1:  2002/9/11 =A4W=A4=C8 02:19:22
>     =A6=AC=A5=F3=AA=CC: "ericg@xxxxxxxxxxx" <ericg@xxxxxxxxxxx>
>     =BD=C6=A5=BB: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
>     =A5D=A6=AE: [SI-LIST] Re: Serpentine Traces
>
>
>     Eric ,
>         For the example given, 176 ps/in -> 170 ps/in the difference =
was
>     between 5/50 and 5/20 (Line width, /Line Spacing). The delay
variations
>     were even more dramatic at tighter spacings.
>
>     To answer Andy's question, I click Info in Allegro - which I =
believe
>     measures the center of the line.
>
>     Regards,
>     Bob
>     --
>     Robert J. Haller (rhaller@xxxxxxxxxx)
>     Principal Consultant
>     Signal Integrity Software Inc.
>     6 Clock Tower Place, Suite 250
>     Maynard, MA 01754
>     Phone: (978) 461-0449, ext 15
>
>
>     Eric Goodill wrote:
>     > Bob,
>     >
>     > What is 'close' in your test board?
>     >
>     > -Eric
>     >
>     > Robert Haller wrote:
>     >
>     >
>     >>Praveen,
>     >>  This is a good question and has been raised before on the =
SI-LIST.
>     >>Serpentine etch is often done to match clock lines or source=20
>syncronous
>     >>data lines.
>     >>
>     >>I did bench testing of serpentine lines, in conjuction with=20
>simulations.
>     >>I ran SPICE simulations using field solved 2d models then =
measured
>     >>varying serpentine configurations. I examined impedance and=20
>propagation
>     >>delay variations as a function of varying spacing, and signal=20
>edge rate.
>     >>
>     >>When transmission lines are serpentined 'close' to themselves =
the
>     >>propagation delay decreases (The lines got faster). For example =
if I
>     >>compare a straight control line and a sepertined line of the=20
>same length
>     >>on the same layer, with all the fixturing nulled the =
propagation=20
>delay
>
>     >>went from 176ps/in (straight line) to 170 ps/inch (serpentined
line).
>     >>You can think of the signal taking a shortcut across the =
distributed
>     >>self capacitance of the closely serpentined lines.
>     >>You might think a propagation delay reduction is good, but I=20
>also found
>     >>the variability of prop velocity increased. I believe the
variability
>     >>increased because the capacitive coupling varies based on =
geometry,
>     >>while normally the dielectric constant variations are the only=20
>source of
>     >>prop delay variability (for a specific rise time and =
frequency). The
>     >>variability is a small effect but is important when doing =
source
>     >>syncronous designs.
>     >>
>     >>
>     >>Regards,
>     >>Bob
>     >
>     >
>     >
>     > =
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>
>     --
>     Robert J. Haller (rhaller@xxxxxxxxxx)
>     Principal Consultant
>     Signal Integrity Software Inc.
>     6 Clock Tower Place, Suite 250
>     Maynard, MA 01754
>     Phone: (978) 461-0449, ext 15
>
>
>     =
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