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[SI-LIST] Re: PCI Express Simulation @ 5Gbps (Gen2 Speed)

  • From: "Tom Dagostino" <tom@xxxxxxxxxxxxx>
  • To: <j.jebakumarsamuel@xxxxxxxxxxxxx>, "'SI - LIST'" <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 11 Sep 2007 08:16:08 -0700
There are two approaches:

Pick your favorite 3D solver, build a 3D model of the connector and it's
launch and run the simulations to extract the S-parameters.

Build a test board using the launch you will use in your final product and
use a TDR or VNA to measure the S-parameters.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@xxxxxxxxxxxxx 
www.teraspeed.com 

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of J.Jebakumar Samuel
Sent: Tuesday, September 11, 2007 7:47 AM
To: 'SI - LIST'
Subject: [SI-LIST] PCI Express Simulation @ 5Gbps (Gen2 Speed)


Hi Guys,
I am designing a PCI Express add-in card and i am planning to simulate the
PCI Express interface.  I tried to obtain the connector models from the
vendors but i was not able to obtain one.  How do i model the s-parameters
of the connector?

Regards,
Jebakumar Samuel
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