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[SI-LIST] Cisco Systems Opportunity - Signal Integrity Tech Lead (Focus on ASIC development and design) San Jose

From: "Dale Hamilton -X (dalhamil - Spherion at Cisco)" <dalhamil@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Wed, 5 Sep 2007 20:28:01 -0700

At Cisco, our vision is to change the way people work, live, play and
learn. 
Do you have what it takes to join one of the most innovative companies
in the high-tech industry?

Cisco seeks a Technical Leader for the Gigabit Switch Business Unit
(GSBU) in Signal Integrity focused on ASIC development and design. 
 
Job functions include power integrity analysis and rules for
chip/package/board, on-chip I/O placement guidelines, flipchip package
design rules and pinout definition, I/O modeling and interoperability
simulation of high speed serdes and memory interfaces, guarantee chip
level timing and noise mitigation. Will work with ASIC logic designers,
system board designers, and CAD team. Will interface with external
suppliers. 
 
Should have experience with HSPICE, Matlab, Verilog AMS. Other tools
include Cadence MGH, Agilent ADS, Sigrity. Must have a minimum of 5-7
years of relevant work experience, and a BSEE. MSEE and PhD preferred.
R818574
 
Position is located in San Jose, CA.

Discover all that's possible for your career by submitting your resume
to dalhamil@xxxxxxxxxx
 
Thank you!
 
Dale Hamilton
Cisco Systems 
www.cisco.com/jobs
 
 
 
 

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