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[SI-LIST] DDR 2 Unbuffered DIMM - differential clock termination

From: "John Ellis" <John.Ellis@xxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Tue, 6 Sep 2005 11:25:18 -0700

Hello All,
 

How was ~67 Ohms differential termination arrived at for DDR2 UB DIMMs?
Is there a JEDEC reference for this?  

 

Many thanks in advance.

 

 

John Ellis

Sr. Staff R&D Engineer

 

Synopsys, Inc.

7535 Windsor Drive

Suite B103

Allentown, PA 18195

 

Tel(610)395-6702

Cel(717)439-0981

jellis@xxxxxxxxxxxx

 


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