FreeLists / si-list / [SI-LIST] Re: Serpentine Traces

["john lipsius" <johnlipsius@xxxxxxxxx>]

Praveen,

I'm assuming you're designing something where signals have typical 
desktop/server computer, or even Gbps digital bandwidth....In that 
case, why are you concerned about group delay due to corners?   
You're just not pumping enough hi-BW signal energy into the traces to 
make group delay a problem.  

The reply post below addresses the only concern, but it talks about outgoing 
vs. incoming, which I don't understand.  I assume you just want to serpentine a 
single clock trace, for example. 

A sufficient rule of thumb:  edge-edge separation of serpentine to any other 
trace should be at least 3 times the serpentine trace width so that crosstalk 
is 
minimal.  

A good VNA will have group delay (GD) measurement ability.  If you're actually 
doing something exotic, then see Agilent appnote AN 1287-1, page 11, but I 
suspect (if you're using FR4) the pcb dielectric loss will be a bigger factor 
in SI, 
way before GD enters into the picture.  If I'm right, then you need to simulate 
with 
lossy transmission line model before worrying about GD. 


----- Original Message ----- 
From: "Gupta, Deepali" <Deepali.Gupta@xxxxxxxxx>
To: <psoora@xxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Sent: Friday, September 06, 2002 5:00 PM
Subject: [SI-LIST] Re: Serpentine Traces


> 
> Hi Praveen,
> 
> Well the first and foremost rule you should remeber about using serpentine
> traces is that they do have their drawbacks. For one while routing them you
> should avoid switchback cases which will cause if very close, heavy
> coupling. Switchback means having the outgoing traces parallel to incoming
> trace.
> 
>                      --------    ->
>                              |    -> In this the two traces are 
>                      --------    ->  parallel. Switchback case.
>                      |
>                      --------
>                              |
>                      -------- 
> Don't wiggle them too close. There is a good article on this in the archive
> section of........http://www.signalintegrity.com/  Go to serpentine delays
> article.
> 
> Regards,
> Deepali
> Deepali Gupta
> Product Engineer
> (408)-522-4701
> Actel Corporations
> 
> 
> -----Original Message-----
> From: Praveen Soora [mailto:psoora@xxxxxxxxx]
> Sent: Friday, September 06, 2002 4:41 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Serpentine Traces
> 
> 
> 
> Hello,
> 
> Does anybody know the design rules of the serpentine traces  on the 
> board ? I am trying to evaluate different types of serpentine traces 
> looking at the group delay caused by the corners. Any information or 
> literature on this would be appreciated.
> 
> Thanks,
> --
> Praveen Soora
> ECAD Engineering,
> Apple Computer Inc.,
> 408 974 0595
> 
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