FreeLists / si-list / [SI-LIST] Re: about 'flat region'

[Ray Anderson <Raymond.Anderson@xxxxxxx>]

qzheng -

Look up "non incident wave switching".

(See page 160 in Howard Johnson's book 
"High Speed Digital Design,  and page 77
in Brian Young's book "Digital signal Integrity").

When a t-line is driven from a source whose source impedance
is > than that of the t-line there is a voltage division
across the t-line Z and the source Z. The resulting signal
reaching the far end of the t-line is scaled by the voltage
divider such that it is Zline/(Zline+Zsource) times the source
voltage. The level will probably not be sufficient to switch the
logic at the far end of the line on the first incidence and
will depend on the superposition of a reflected wave to add
to the original incident wave. If you look at it on a scope
you will see a plateau (the incident wave) and then a higher
amplitude signal a time-of-flight later (when the reflected
signal adds in).

-Ray Anderson
Sun Microsystems Inc.                                                           
                                                   

>
>
>Hello si-list,
>
>   Always we can observe  'flat region or shelf ' at the rising or
>
>   falling edge , and this may produce some error in digital circuits
>
>   , so where can i find some literature about this problem ??
>
>   
>   thanks in advance
>
>
>-- 
>Best regards,
> qzheng                          mailto:qzheng@xxxxxxxxxxxxxxxx

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