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Thread Index for si-list, 09-2001

[si-list] || [09-2001 Date Index] [09-2001 Thread Index]

  1. [SI-LIST] Re: Gigabit fiber transceivers, EMI, trace lengths, and... antennas., RMELLISON
  2. [SI-LIST] Re: Spice simulators, Abe Riazi
  3. [SI-LIST] non-negative off diagonal capacitive matrix elements, Eric Bogatin
  4. [SI-LIST] Re: PCI at 66 Mhz, Weber Chuang
  5. [SI-LIST] Re: non-negative off diagonal capacitive matrix elements, Zabinski, Patrick J.
  6. [SI-LIST] Re: copper thickness of a ref plane, Ken Cantrell
  7. [SI-LIST] Re: non-negative off diagonal capacitive matrix elements ??, Chris Cheng
  8. [SI-LIST] Re: Gigabit fiber transceivers, EMI, trace lengths, and... antennas., Ray Anderson
  9. [SI-LIST] Re: non-negative off diagonal capacitive matrix elements ??, Chris Cheng
  10. [SI-LIST] FW: spectral domain vs BEM (was non-negative......), Zhou, Xingling (Xingling)
  11. [SI-LIST] Re: spectral domain vs BEM (was non-negative......), Ray Anderson
  12. [SI-LIST] FET probe caution, Douglas C. Smith
  13. [SI-LIST] Jitter transfer - urgent, Rengarajan S Krishnan
  14. [SI-LIST] Re: Gigabit fiber transceivers, EMI, trace lengths, and... ante..., RMELLISON
  15. [SI-LIST] Signal quality for 60X?, Chandrashekhar K
  16. [SI-LIST] Translation, Rich Peyton
  17. [SI-LIST] Re: Translation, Rich Peyton
  18. [SI-LIST] Track Impedance, Viral
  19. [SI-LIST] Tightly coupled VS loosely coupled diff pairs, Chris Mesibov
  20. [SI-LIST] EBD to HSPICE conversion, Hassan Ali
  21. [SI-LIST] GR-1377, George Rasko
  22. [SI-LIST] Re: Tightly coupled VS loosely coupled diff pairs, MikonCons
  23. [SI-LIST] Isolation, Zhou, Xingling (Xingling)
  24. [SI-LIST] EPEP'01 and FDIP'01 in Cambridge, MA, Alina Deutsch
  25. [SI-LIST] IBM-hosted Student Reception at EPEP'01, Alina Deutsch
  26. [SI-LIST] Re: Isolation, Hassan Ali
  27. [SI-LIST] Re: CMOS is right but can't be do in XTK or ICX., Dagostino, Tom
  28. [SI-LIST] Re: Self Inductance and TDR measurements, Neeraj Pendse
  29. [SI-LIST] lists, Peter Shin
  30. [SI-LIST] non-negative off diagonal capacitive matrix elements ??, fname lname
  31. [SI-LIST] Antwort: GR-1377, Andreas Lenkisch
  32. [SI-LIST] PCI undershoot/overshoot, Ramesh . Reddy
  33. [SI-LIST] Looking for easy way to get avanti awaves screen shots into .tif or .jpg, Greim, Michael
  34. [SI-LIST] JEDEC 1, 2, and 3, Ravinder Ajmani
  35. [SI-LIST] Re: Looking for easy way to get avanti awaves screen shots into .tif or .jpg, Kai Keskinen
  36. [SI-LIST] Specctraquest.com is online., cadpro2k
  37. [SI-LIST] Breakdown voltage for 3mil core, Alex Horvath
  38. [SI-LIST] Re: Looking for easy way to get avanti awaves screen sh ots into .tif or .jpg, Ray Anderson
  39. [SI-LIST] Call for papers 2002EMC Symposium, Charles Grasso
  40. [SI-LIST] Re: Breakdown voltage for 3mil core, Seol Byongsu
  41. [SI-LIST] purpose of 8b/10b encoding, Zabinski, Patrick J.
  42. [SI-LIST] Re: purpose of 8b/10b encoding, Zabinski, Patrick J.
  43. [SI-LIST] x y caps, v r
  44. [SI-LIST] BER and Adaptive Equalization, Kai Keskinen
  45. [SI-LIST] is 8b/10b too much or too little?, Zabinski, Patrick J.
  46. [SI-LIST] Cancellation of tonight's IEEE SCV EMC Social Event, Mellberg Hans
  47. [SI-LIST] Re: BER and Adaptive Equalization, Kai Keskinen
  48. [SI-LIST] Re: is 8b/10b too much or too little?, Zabinski, Patrick J.
  49. [SI-LIST] Re: Looking for easy way to get avanti awaves screen shots into .tif or .jpg, Daniel N de Araujo
  50. [SI-LIST] Re: x y caps, Roehrner Wolfgang
  51. [SI-LIST] Variable Capacitor, Adam Klein
  52. [SI-LIST] Re: Variable Capacitor, Nagel, Michael
  53. [SI-LIST] dc blocking caps, saeen malik
  54. [SI-LIST] S-parameter measurement, Bob Patel
  55. [SI-LIST] a question about function of power integrity, sedliy
  56. [SI-LIST] paper posted, Douglas C. Smith
  57. [SI-LIST] Single driver driving two source terminated lines, Bob Patel
  58. [SI-LIST] Re: Use of Ceramic substrates at High Frequencies, Anil Pannikkat
  59. [SI-LIST] Bandwidth, Rich Peyton
  60. [SI-LIST] Re: Bandwidth, Zhou, Xingling (Xingling)
  61. [SI-LIST] Daisy chain approach, Bob Patel
  62. [SI-LIST] RMCEMC 2001 EMC Symposium Update, Charles Grasso
  63. [SI-LIST] Curious about feedback on CTS corp clearone resistor networks....., Greim, Michael
  64. [SI-LIST] Question on pull up/pull down resistors., anbu
  65. [SI-LIST] Proximity effect and the HSPICE w-element field solver, chris.h.simon
  66. [SI-LIST] Re: Proximity effect and the HSPICE w-element field solver, Ray Anderson
  67. [SI-LIST] RF via, Alex Horvath
  68. [SI-LIST] Mutual inductance between solenoids without hours of E-M solver time?, Steve Rogers
  69. [SI-LIST] Re: RF via, Dan Swanson
  70. [SI-LIST] Multiple Vref inputs for QDR SRAMs, Aaron Frank
  71. [SI-LIST] Re: 45 Degree Bends vs. Rounded Corners, Rich Peyton
  72. [SI-LIST] Re: True ground versus local ground ..., Ray Anderson
  73. [SI-LIST] port terminations, Vijay Varadarajan
  74. [SI-LIST] Analog or Digital, Bob Patel
  75. [SI-LIST] 1394 simulation, =?big5?b?Um9nZXIuV3UgKKdkrVqqTCk=?=
  76. [SI-LIST] Re: port terminations, Dan Swanson
  77. [SI-LIST] How Do Others Do Timing Analysis Without Tool Like BLAST, polus
  78. [SI-LIST] Re: How Do Others Do Timing Analysis Without Tool Like BLAST, Greim, Michael
  79. [SI-LIST] Serpentining one side of a differential pair, zanella, fabrizio
  80. [SI-LIST] HSTL (QDR) Terminations, Aaron Frank
  81. [SI-LIST] Re: Serpentining one side of a differential pair, Knighten, Jim L
  82. [SI-LIST] W Model for transmission lines, richard hill
  83. [SI-LIST] Re: W Model for transmission lines, Greim, Michael
  84. [SI-LIST] Aalog or Digital, Bob Patel
  85. [SI-LIST] measuring final settle time in HSPICE, Mike LaBonte
  86. [SI-LIST] IBIS v3.2 board modeling, Cosmin Iorga
  87. [SI-LIST] Job opening: High speed serial IC characterization manager, E L
  88. [SI-LIST] RMCEMC SEP Meeting Presentation download, Charles Grasso
  89. [SI-LIST] New SI Class, Gary Otonari
  90. [SI-LIST] JTAG Guru's, Trey Henderson
  91. [SI-LIST] return currents, Peterson, James F (FL51)
  92. [SI-LIST] Re: Convergence problems with Hspice, Ingraham, Andrew
  93. [SI-LIST] Looking for Senior SI Engineer at Gore, Craig R Theorin
  94. [SI-LIST] Re: return currents, Larry Smith
  95. [SI-LIST] Sr. Signal Integrity Engineer needed;, Mark Apton
  96. [SI-LIST] LC filters on power pins, David Kaiser
  97. [SI-LIST] 4layer board stack up for PCI boards, GOPALCHETI,MANOJ (HP-Cupertino,ex1)
  98. [SI-LIST] Can Somone explain port definition for HFSS (For beginner), Steve Rogers
  99. [SI-LIST] Common mode clock coupling, Doug Brooks
  100. [SI-LIST], Albert Ruehli
  101. [SI-LIST] Re: 4layer board stack up for PCI boards, Douglas C. Smith
  102. [SI-LIST] 3-db bandwith of system, Bob Patel
  103. [SI-LIST] PECL clock driver model, hata
  104. [SI-LIST] rms jitter vs p-p jitter, hata
  105. [SI-LIST] Re: Flip-Chip design, Seol Byongsu
  106. [SI-LIST] Re: rms jitter vs p-p jitter, Bradley S Henson
  107. [SI-LIST] seeking SI position, vdmh
  108. [SI-LIST] Re: Can Somone explain port definition for HFSS (For be ginner), Seol Byongsu



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