FreeLists / si-list / [SI-LIST] Re: Cable grounding scheme

["Chris Cheng" <Chris.Cheng@xxxxxxxxxxxx>]

"Today, the commonplace approach, at least in
the designs that I observe, is to suppress the low frequency CM currents 
with power line filters and directly connect the chassis and digital
grounds at practically as many points as possible against radiated
emissions."
 
We are more in agreement than you think. I happened to be a simple minded 
person and simple means having everything in common and tying them up as tight 
as one can. 
That said, I am in the business of big iron servers. I don't do communication 
switches, consumer stuff nor desktop/side boxes. If you step back and think 
about what sticks out of a server, it will most likely be some hba or hub cards 
from PCIX/e slots or peripherals like cdrom that I have no control or even have 
an idea what's going on inside. What I do on the motherboard or at the 
centerplane will unlikely to have significant impact because they are buried 
inside the chassis. Hence the fatalistic view below.
 

-----Original Message-----
From: Ihsan Erdin [mailto:erdinih@xxxxxxxxx]
Sent: Wednesday, August 16, 2006 5:45 AM
To: Chris Cheng
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Cable grounding scheme


Ethernet isolation is more of a safety issue than EMI/SI, which overrides the 
design considerations here; hence beyond the scope of the discussion. 
I think I made myself clear in the previous discussion. For any specific 
application, each designer can use his common sense within the framework of the 
general picture I drew there.
 
Regards,
 
Ihsan

 
On 8/16/06, Chris Cheng < Chris.Cheng@xxxxxxxxxxxx> wrote: 

We can argue about tying chassis to logic ground here or there till everyone 
faces turn blue but specs like Ethernet calls out specifically for isolated 
chassis from logic ground on RJ45. FC-PI CHANGES from DC short between logic 
and chassis (in optical modules) to complete isolation (in quad lane 
connector). So how do you dictate a system that support iSCSI and FCAL at the 
same time ? 
To make things more fun, what are you going to do with peripherals like disk 
drives and cdrom ? Have you ohm out your disk drive chassis and your disk cable 
ground lately ? Do you even see them being consistent between different vendors 
? 


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto: si-list-bounce@xxxxxxxxxxxxx]On Behalf Of chen_jinhua@xxxxxxx
Sent: Tuesday, August 15, 2006 9:13 AM
To: erdinih@xxxxxxxxx; xileil@xxxxxxxxxxx  <mailto:xileil@xxxxxxxxxxx> 
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Cable grounding scheme


Ihsan

If I understand your email correctly, you still use separate chassis and 
logic grounds. But you use many many stitching points to connect them
together. If you consider the high speed cable application. It will
impact SI. If the cable does not have separate logic and chassis
grounds. Cable reference is chassis ground when it connects to the board 
connector. From connector to semiconductor chips, there will be a
reference interruption because chip references to logic ground. Depends
on how bad of the reference interruption, the SI impacts will vary. If
the signal-point connection is used, I would guess the SI impact is
huge.

This brings an old question: single-point connection vs. many many
points of connections, which one we prefer for high speed SI and EMI? Or 
it depends ...

Thanks!

Jinhua
________________________________

From: Ihsan Erdin [mailto: erdinih@xxxxxxxxx]
Sent: Tuesday, August 15, 2006 9:40 AM
To: Xilei Liu 
Cc: chen, jinhua; si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Cable grounding scheme


Celine,

First of all, I want to express my apologies to Jinhua for -kind of- 
hijacking his topic for a potentially flaring issue.
I think this issue goes as far back as the debate over single-point
vs.multi-point connection between chassis and digital grounds. As such,
it is more of an conducted/radiated emission problem than SI. The 
dilemma is while single-point connection could be justified by the fact
that it avoids very low frequency common mode (noise) currents from
creeping into the power line, in order to cut down on the radiated
emissions at high frequencies, multi-point connection is strictly 
required between the two reference systems. In his "EMC and printed
Circuit board design theory and layout made simple" book, for example,
M. Montrose suggests stitching the two reference systems at a distance 
of lambda/20, with lambda being the wavelength of the highest frequency
component of the spectrum of the system. The book was published in 1999.
With today's multi-gigahertz systems, it's impossible to achieve such a 
design goal and it's an overkill at any rate. But the necessity of
multi-point connection is not a debate any more. Some designers try to
find a mid-way by connecting the reference systems with high frequency
caps but the boards are already overly-populated by the same type of
caps used for decoupling and there's the issue of parasitic inductances
that defeat the purpose. Today, the commonplace approach, at least in
the designs that I observe, is to suppress the low frequency CM currents 
with power line filters and directly connect the chassis and digital
grounds at practically as many points as possible against radiated
emissions.
If you want to see some numbers and charts to support these ideas, in 
"EMI and Troubleshooting Techniques" book, M. Mardiguian gives a very
good example that compares the two grounding strategies.

Regards,

Ihsan


On 8/15/06, Xilei Liu <  <mailto:xileil@xxxxxxxxxxx> xileil@xxxxxxxxxxx> wrote:

       Hey, Ihsan,

       I've ever seen notes that published in the past in 2002, saying
that"we
       learned from NRAO engineers that it is both feasible and
advisable to
       physically separate digital circuits from analog systems, and to
interpose a
       minimum of two levels of Faraday shielding acting in series."
From my point
       of view, it should be easier to employ different EMI solutions 
for power
       line and signal line separately when the digital/analog grounds
are
       separated and connected somehow at a single-point. What will be
the problems
       in terms of SI? Welcome your 'fight back' so that I can learn 
more ;)

       Regards,
       Celine


       >From: "Ihsan Erdin" < erdinih@xxxxxxxxx>
       >Reply-To: erdinih@xxxxxxxxx
       >To: chen_jinhua@xxxxxxx
       >CC: si-list@xxxxxxxxxxxxx
       >Subject: [SI-LIST] Re: Cable grounding scheme 
       >Date: Tue, 15 Aug 2006 06:29:32 -0400
       >
       >This question makes me wonder if there're any designers left
who still
       >separate logic ground from the chassis ground in high-speed 
digital circuit
       >design -and on what basis? I thought this whole issue of
chassis vs. logic
       >ground was something of the past.
       >Regards,
       >
       >Ihsan
       >
       >On 8/14/06, chen_jinhua@xxxxxxx < chen_jinhua@xxxxxxx > wrote:
       > >
       > > Hi,
       > >
       > > I have a few general questions about the high speed cable
grounding
       > > scheme. It could impact both SI and EMI. I would like to
have your
       > > inputs about this issue. 
       > >
       > > Scheme 1: cable does not separate logic ground and chassis
ground. But
       > > when it connects the system/boards, the system/boards have
separate
       > > logic ground and chassis ground. How do you separate/connect 
the logic
       > > ground to chassis ground in boards? What is the pros and
cons for SI
       > > and/or EMI?=20
       > >
       > > Scheme 2: Cable keeps separate logic ground and chassis 
ground.
       > > System/boards also keep the separate logic and chassis
ground. Cable
       > > logic ground and board logic ground connects, and chassis
connects the
       > > chassis ground. How do you separate/connect the logic ground 
to chassis
       > > ground in boards? What is the pros and cons for SI and/or
EMI?
       > >
       > > Do you prefer scheme 1 or scheme 2? What is the pros and
cons of scheme
       > > 1 vs. scheme 2 for SI and/or EMI? Does SI and EMI have 
conflict
       > > requirements?
       > >
       > > Thanks!
       > >
       > > Jinhua Chen
       > > SI of Hardware Engineering
       > > EMC Corp. 
       > >



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