FreeLists / si-list / [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design

[<Cortex.Chen@xxxxxxxxxxxx>]

Yeah, please check the section 8.2.

Regards,

Cortex

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On Behalf Of Nash, Tim J (EHCOE)
Sent: Tuesday, August 15, 2006 3:19 AM
To: nrpatel@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Setup-Hold Equations for Source Synchronous =
Design

Nikhil,
The book "High-Speed Digital System Design: A Handbook of Interconnect
Theory and Design Practices" by Stephen Hall, Garrett Hall, and  James
McCall, has a very good explanation of how to calculate setup and hold
margin for source synchronous designs.

Regards,
Tim Nash


__________________________________
Timothy J. Nash, P.E.
Honeywell, Inc.
Defense & Space Electronic Systems
13350 U.S. Hwy 19 N
M/S 105-4
Clearwater, FL  33764-7290
Office : 727-539-2437
Fax     : 727-539-3933
Email  :  tim.j.nash@xxxxxxxxxxxxx


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of nrpatel@xxxxxxxxxxx
Sent: Monday, August 14, 2006 3:14 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Setup-Hold Equations for Source Synchronous Design

Hello all,
Can someone point me out to a good reference that explains the setup and
hold margin calculations for a source synchronous design like DDR?
Did not have much luck googling.

Thanks,
Nikhil=20



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