Date Index for si-list, 08-2006

[si-list] || [08-2006 Date Index] [08-2006 Thread Index]

[SI-LIST] Michael W Wielebski/Mequon/RA/Rockwell is out of the office. - Michael W Wielebski
[SI-LIST] Ansoft SIwave vs. Cadence Allegro - Michael PARKER
[SI-LIST] Re: Ansoft SIwave vs. Cadence Allegro - Xilei Liu
[SI-LIST] Asian IBIS Summit (China) First Announcement - Bob Ross
[SI-LIST] Locating "hot" grounds - Doug Smith
[SI-LIST] eye diagram in awaves - Leo Hu
[SI-LIST] Re: eye diagram in awaves - Jim Antonellis
[SI-LIST] Re: eye diagram in awaves - Zhangkun
[SI-LIST] Circuit for differential to single end conversion - Srivats Partha
[SI-LIST] Re: Circuit for differential to single end conversion - steve weir
[SI-LIST] Re: Circuit for differential to single end conversion - Hill, John
[SI-LIST] DDRAM BUS Testing - Fraiman, Edi
[SI-LIST] Re: DDRAM BUS Testing - Fraiman, Edi
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Re: DDRAM BUS Testing - Michael Rose
[SI-LIST] SSN analysis? - Fasig, Jonathan L.
[SI-LIST] Re: SSN analysis? - Peterson, James F \(EHCOE\)
[SI-LIST] Re: SSN analysis? - Ihsan Erdin
[SI-LIST] Re: SSN analysis? - Mark Alexander
[SI-LIST] FW: High Speed SI Support Position at Mentor Graphics - Fouch, Marty
[SI-LIST] Re: DDRAM BUS Testing - Grasso, Charles
[SI-LIST] Re: DDRAM BUS Testing - Kai Keskinen
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Re: DDRAM BUS Testing - Ihsan Erdin
[SI-LIST] Re: DDRAM BUS Testing - Ihsan Erdin
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Re: DDRAM BUS Testing - Hal Murray
[SI-LIST] Re: DDRAM BUS Testing - Jim Antonellis
[SI-LIST] Re: DDRAM BUS Testing - Grasso, Charles
[SI-LIST] Re: DDRAM BUS Testing - Larry Smith
[SI-LIST] Re: DDRAM BUS Testing - Ihsan Erdin
[SI-LIST] Re: DDRAM BUS Testing - Ihsan Erdin
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Re: DDRAM BUS Testing - Jim Antonellis
[SI-LIST] Re: DDRAM BUS Testing - Jim Antonellis
[SI-LIST] Re: DDRAM BUS Testing - steve weir
[SI-LIST] Wire bonding - david stern
[SI-LIST] Re: Wire bonding - steve weir
[SI-LIST] R: Wire bonding - gianguida
[SI-LIST] SATA thru Board-to-Board Connector - Joe Paul M
[SI-LIST] Re: SATA thru Board-to-Board Connector - Fraiman, Edi
[SI-LIST] Re: SATA thru Board-to-Board Connector - Joe Paul M
[SI-LIST] Re: SATA thru Board-to-Board Connector - Corey Kimble
[SI-LIST] Re: Wire bonding - Salkow, Steven
[SI-LIST] R: Re: Wire bonding - gianguida
[SI-LIST] Re: R: Re: Wire bonding - Xilei Liu
[SI-LIST] Re: R: Re: Wire bonding - steve weir
[SI-LIST] Re: R: Re: Wire bonding - Douglas Burns
[SI-LIST] R: Re: R: Re: Wire bonding - gianguida
[SI-LIST] Signal Integrity Opportunity in San Jose - Ed Smay
[SI-LIST] Asian IBIS Summit (Japan) First Announcement - Mirmak, Michael
[SI-LIST] 4 month Signal Integrity Contract at Intel in Santa Clara, CA - James Van
[SI-LIST] Frequency-dependent transmission line in PSpice? - J. Eric Bracken
[SI-LIST] Re: 4 month Signal Integrity Contract at Intel in Santa Clara, CA - Oscar Lang
[SI-LIST] Minimally invasive monitoring - Bernard Harris
[SI-LIST] How to compensate the result if the flight time is a negative value?Thanks! - Zhang Haitao
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Benny Yan
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Zhang Haitao
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Benny Yan
[SI-LIST] 回复： Re: How to compensate the result if the flight time is a negative value?Thanks! - Yuming Cheng
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Zhang Haitao
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Khan, Mohammad I
[SI-LIST] Setup-Hold Equations for Source Synchronous Design - nrpatel
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - Nash, Tim J \(EHCOE\)
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - Clewell, Craig
[SI-LIST] Cable grounding scheme - chen_jinhua
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - Cortex.Chen
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - Zhang Haitao
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - preetesh rathod
[SI-LIST] May I know how can I check the ibis model from vendor - fei xue
[SI-LIST] Re: May I know how can I check the ibis model from vendor - Henrik Madsen
[SI-LIST] Re: May I know how can I check the ibis model from vendor - Yuming Cheng
[SI-LIST] Re: How to compensate the result if the flight time is a negative value?Thanks! - preetesh rathod
[SI-LIST] Re: Cable grounding scheme - Ihsan Erdin
[SI-LIST] 回复： Re: May I know how can I check the ibis model from vendor - fei xue
[SI-LIST] Re: Cable grounding scheme - Xilei Liu
[SI-LIST] Re: Cable grounding scheme - Ihsan Erdin
[SI-LIST] Re: Cable grounding scheme - chen_jinhua
[SI-LIST] Re: Minimally invasive monitoring - Alan . Hiltonnickel
[SI-LIST] Re: Cable grounding scheme - Lee Ritchey
[SI-LIST] Asian IBIS Summit (China) Second Announcement - Bob Ross
[SI-LIST] Re: Cable grounding scheme - chen_jinhua
[SI-LIST] Re: Cable grounding scheme - Salkow, Steven
[SI-LIST] Re: Cable grounding scheme - Ihsan Erdin
[SI-LIST] Re: 回复： Re: May I know how can I check the ibis model from vendor - Benny Yan
[SI-LIST] Re: Cable grounding scheme - Chris Cheng
[SI-LIST] Return current - Vighnesh_Das
[SI-LIST] Re: Cable grounding scheme - Ihsan Erdin
[SI-LIST] Re: Cable grounding scheme - chen_jinhua
[SI-LIST] Re: Cable grounding scheme - Ihsan Erdin
[SI-LIST] Re: Cable grounding scheme - Chris Cheng
[SI-LIST] Reflection on differential termination - shekhar sharma
[SI-LIST] Reflection on differential termination [correction] - shekhar sharma
[SI-LIST] measuring switching thersholds - Peterson, James F \(EHCOE\)
[SI-LIST] Re: Reflection on differential termination - steve weir
[SI-LIST] Re: measuring switching thersholds - Andrew Ingraham
[SI-LIST] Reflection due to far end capacitor - shekhar sharma
[SI-LIST] Re: Reflection due to far end capacitor - steve weir
[SI-LIST] Re: measuring switching thersholds - Andrew Ingraham
[SI-LIST] Re: measuring switching thersholds - Peterson, James F \(EHCOE\)
[SI-LIST] IBM Alphaworks Program - Ray Anderson
[SI-LIST] Re: IBM Alphaworks Program - Ken Cantrell
[SI-LIST] Re: IBM Alphaworks Program - Ray Anderson
[SI-LIST] High power shunt (~5A) - Long nguyen
[SI-LIST] Re: High power shunt (~5A) - steve weir
[SI-LIST] Re: May I know how can I check the ibis model from vendor - pal pal
[SI-LIST] PCB impedance coupon measurement - Geetha Balasubramanian
[SI-LIST] 30 minute podcast from IEEE EMC Symposium - Doug Smith
[SI-LIST] DDR logic threshold - Naren Thesia
[SI-LIST] hspice convergence problem - Leo Hu
[SI-LIST] Re: DDR logic threshold - steve weir
[SI-LIST] Re: hspice convergence problem - steve weir
[SI-LIST] Re: PCB impedance coupon measurement - Itzhaki, Dori
[SI-LIST] Re: DDR logic threshold - Fraiman, Edi
[SI-LIST] Re: hspice convergence problem - Andrew Ingraham
[SI-LIST] Hot Jobs @ Intel - e077636
[SI-LIST] Re: May I know how can I check the ibis model from vendor - Abe (Abbas) Riazi
[SI-LIST] Re: hspice convergence problem - Vani Kaushik
[SI-LIST] DDR-simulation - kranthi
[SI-LIST] DC resistance measurement - Zhangkun
[SI-LIST] Re: DC resistance measurement - Istvan Novak
[SI-LIST] Re: DC resistance measurement - Xilei Liu
[SI-LIST] Re: DC resistance measurement - Grasso, Charles
[SI-LIST] Re: DC resistance measurement - Andrew Ingraham
[SI-LIST] Re: DC resistance measurement - Taylor Jones
[SI-LIST] Re: DC resistance measurement - Aubrey_Sparkman
[SI-LIST] Re: DC resistance measurement - Andrew Ingraham
[SI-LIST] 回复： DDR-simulation - 彬 龙
[SI-LIST] Re: PCB impedance coupon measurement - Kenny Frohlich
[SI-LIST] Re: PCB impedance coupon measurement - David Instone
[SI-LIST] Re: Reflection due to far end capacitor - Joe Paul M
[SI-LIST] Re: PCB impedance coupon measurement - Itzhaki, Dori
[SI-LIST] Re: Return current - Joe Paul M
[SI-LIST] Re: Phase jitter vs. period jitter - Jai Shanker
[SI-LIST] Re: PCB impedance coupon measurement - Mandy Tsai \(TPE\)
[SI-LIST] Re: Phase jitter vs. period jitter - Vinu Arumugham
[SI-LIST] SATA Cable Assembly Models - Dunbar, Tony
[SI-LIST] Re: Phase jitter vs. period jitter - Michael Rose
[SI-LIST] Re: Phase jitter vs. period jitter - ji-wei_du
[SI-LIST] flex circuit & chip scale basics - hreidmarkailen
[SI-LIST] Re: SATA Cable Assembly Models - Andrew Drysdale
[SI-LIST] What is the difference between "non dry circuit test" and "dry circuit test" - Zhangkun
[SI-LIST] Re: What is the difference between "non dry circuit test" and "dry circuit test" - Hal Murray
[SI-LIST] What do you do? - Loyer, Jeff
[SI-LIST] Re: What do you do? - Joe Cahill
[SI-LIST] Re: What do you do? - Hargin, Bill
[SI-LIST] Expresscard 1.0 Thermal Spec - Long nguyen
[SI-LIST] Re: What do you do? - DrFWS
[SI-LIST] Re: What do you do? - Tom Dagostino
[SI-LIST] please, recommend a RELAY to use in Device Test Industry - "신연숙"
[SI-LIST] Re: What do you do? - Lisa Hamaker
[SI-LIST] Re: flex circuit & chip scale basics - Markku.Rouvala
[SI-LIST] What is the difference between "non dry circuit test" and - Eric Bogatin
[SI-LIST] Re: What do you do? - Ken Cantrell
[SI-LIST] Re: What do you do? - Jerry Johnson
[SI-LIST] Re: What do you do? - Todd Westerhoff \(twesterh\)
[SI-LIST] Re: What do you do? - art_porter
[SI-LIST] Re: What do you do? - art_porter
[SI-LIST] Re: What do you do? - Gary Morrell
[SI-LIST] Re: What do you do? - Ken Cantrell
[SI-LIST] Re: What do you do? - Richard Schumacher
[SI-LIST] Re: What do you do? - Scott McMorrow
[SI-LIST] Re: What do you do? - Julian Ferry
[SI-LIST] Re: What do you do? - Grasso, Charles
[SI-LIST] Re: What do you do? - Scott McMorrow
[SI-LIST] Re: What do you do? - Todd Westerhoff \(twesterh\)
[SI-LIST] Re: What do you do? - suren eda
[SI-LIST] Re: What do you do? - Julian Ferry
[SI-LIST] Re: What do you do? - Mark Randol
[SI-LIST] Re: What do you do? - Leonard Dieguez
[SI-LIST] SIwave error : BAD_INPUT - Manish Khemani
[SI-LIST] Re: What do you do? - Andrew W. Riley III
[SI-LIST] Re: Expresscard 1.0 Thermal Spec - Xilei Liu
[SI-LIST] Re: SIwave error : BAD_INPUT - Buchs, Kevin J.
[SI-LIST] Chips, Circuits to extend length of DVI-I, DVI-D, DVI-A and USB cables - Bashir, Shiraz \(GE Healthcare\)
[SI-LIST] Re: What do you do? - hreidmarkailen
[SI-LIST] Re: What do you do? - Straty Argyrakis \(straty\)
[SI-LIST] Asian IBIS Summit (China) Third Announcement - Bob Ross
[SI-LIST] Re: flex circuit & chip scale basics - hreidmarkailen
[SI-LIST] PCB Fabrications - Subramanian R
[SI-LIST] hi - chand basha
[SI-LIST] Join the Anatrim revolution - Gerry Kendall
[SI-LIST] Re: Expresscard 1.0 Thermal Spec - Andrew Ingraham
[SI-LIST] 6 port via - dharmendra saraswat
[SI-LIST] Re: 6 port via - Aubrey_Sparkman
[SI-LIST] Re: 6 port via - Silqun Leung
[SI-LIST] Re: 6 port via - Tom Dagostino
[SI-LIST] Re: 6 port via - Clewell, Craig
[SI-LIST] Re: 6 port via - art_porter
[SI-LIST] Hyperlynx Results interpretation - Erin . McPhalen
[SI-LIST] Job Opening - SI CW Position - Ma, Samuel E
[SI-LIST] Re: 6 port via - Ihsan Erdin
[SI-LIST] Re: 6 port via - Loyer, Jeff
[SI-LIST] What is the acceptable minimum pre-preg thickness for volume manufacturing? - Gilles Aminot
[SI-LIST] Timing equations - help - kranthi
[SI-LIST] Re: Timing equations - help - Alex_Messan
[SI-LIST] Re: Hyperlynx Results interpretation - Padmanaban Balamuraleedharan - TLS, Chennai
[SI-LIST] Re: Timing equations - help - Cortex.Chen
[SI-LIST] Re: What do you do? - Mike Heimlich
[SI-LIST] ddr2 timing simulation - Moshe Frid
[SI-LIST] Spice Noise Analysis - Pramod Parameswaran
[SI-LIST] Re: What do you do? - Itzhaki, Dori
[SI-LIST] Re: What do you do? - Hill, John
[SI-LIST] free signal integrity seminar coming to your area soon - Eric Bogatin
[SI-LIST] Re: What do you do? - Andrew Ingraham
[SI-LIST] Re: What do you do? - Todd Westerhoff \(twesterh\)
[SI-LIST] Re: What is the acceptable minimum pre-preg thickness for volume manufacturing? - Hill, John
[SI-LIST] Re: What do you do? - Lynne D. Green
[SI-LIST] Re: What do you do? - Shawn Nikoukary
[SI-LIST] Re: What do you do? - art_porter
[SI-LIST] Re: What do you do? - Ken Cantrell
[SI-LIST] Re: What do you do? - Kim Helliwell
[SI-LIST] Re: What do you do? - Bob Drzyzgula
[SI-LIST] Re: What do you do? - Powell, Doug
[SI-LIST] Re: 回复： DDR-simulation - Vani Kaushik
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - Hill, John
[SI-LIST] FW: FW: Electrical Requirements for Packaging class - Jin Zhao
[SI-LIST] Re: What do you do? - Xilei Liu
[SI-LIST] Theory behind extending DVI-I & USB cables beyond their rated length - Bashir, Shiraz \(GE Healthcare\)
[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design - Schimmel Fred-MGI2080
[SI-LIST] Re: ddr2 timing simulation - Benny Yan
[SI-LIST] Re: ddr2 timing simulation - Cortex.Chen
[SI-LIST] Re: What do you do? - Mike Heimlich