FreeLists / si-list / [SI-LIST] Re: PCI Express lane to lane skew

[Dan Bostan <dbostan@xxxxxxxxx>]

Since PCI-Express is a serial protocol, skew is the
only issue, and it should be a function of the size of
the elastic buffer on the input side.
I think the data sheet of the part used as input
and/or the PCI spec should give you an idea of the
maximum delay/skew allowed.
/dan




--- vani.chandrasekharan@xxxxxxxxx wrote:

> 
> =0D
> Hi all,
> 
> What is meant by lane to lane skew in PCI express
> context. Is it the
> time difference of a particular data edge
> transmitted simultaneously on
> any 2 lanes. i.e. relating the length of traces of
> the 2 lanes and hence
> the skew. Or is it something else?
> 
> 
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