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[SI-LIST] Re: Question on ground trace in TL
- From: "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>
- To: "'weirsi@xxxxxxxxxx'" <weirsi@xxxxxxxxxx>, "'mike_bihan@xxxxxxxxxxxx'" <mike_bihan@xxxxxxxxxxxx>, "'han.bi@xxxxxxxxxx'" <han.bi@xxxxxxxxxx>, "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 1 Aug 2005 15:25:02 -0600
Mike - judging from your email I would say that you are using
a well known 2D extractor. I suggest you migrate to a true full
wave solver with 3D solving capabilities.
Best Regards
Charles Grasso
Senior Compliance Engineer
Echostar Communications Corp.
Tel: 303-706-5467
Fax: 303-799-6222
Cell: 303-204-2974
Pager/Short Message: 3032042974@xxxxxxxx
Email: charles.grasso@xxxxxxxxxxxx;
Email Alternate: chasgrasso@xxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Monday, August 01, 2005 7:43 AM
To: mike_bihan@xxxxxxxxxxxx; han.bi@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Question on ground trace in TL
Mike,
Your results are correct. Why would a large structure not resonate? Your=
=20
confusion seems to be the fact that people in a number of situations=20
disregard these resonances. Sometimes that is OK, other times it is not.
Steve.
At 09:24 PM 8/1/2005 +0800, Bi Han wrote:
>Dear friends:
>
>
>
>I did an experiment on TL simulation. The transmission line configuration=
=20
>is CPS.
>
>There is no other ground on the chip.
>
>
>
>++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
>
>
> +++++++++ +++++++++++++++++
>
>DIEL + sig + + GND +
>
> +++++++++ +++++++++++++++++
>
>
>
>+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
>
>
>SUB
>
>
>
>+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>
>
>
>Case A: I set GND trace as reference conductor in 2D solver.
>
>Case B: I set GND trace as signal trace, and place another reference=20
>conductor far away.
>
>
>
>Both cases are simulated in .AC analysis.
>
>In case A, it is a 1 conductor case and the R_term is placed between SIG=20
>and ideal ground (node 0 in hspice).
>
>In case B, it is a 2 conductor case and the R_term is placed between two=20
>conductors and does not connect to ideal ground;
>
>
>
>In short, in case B, ground trace is treated as a signal line; all other=20
>setups are the same.
>
>The simulation setup case B is like below:
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>At far end, a resistor terminates between SIG and GND trace. At near end,=
=20
>same resistor terminates. In case A, both source and load well terminated=
=20
>and at far end, see very smooth voltage gain.
>
>In case B, it is assumed matched. However, in frequency sweep, severe=20
>peaking is seen in far-end voltage.
>
>
>
>The result is very confusing. Which case is real? Both cases have their=20
>drawback.
>
>Case A assumed ground trace to be very quiet and =A1=B00=A1=B1 everywhere.
>
>Case B introduced another reference conductor faraway, which induce=20
>GND/SIG trace =A1=B0common mode=A1=B1 resonance.
>
>
>
>I hope people could wash my mind. (It is quite stuck inside now.) This=20
>experiment also lead me to doubt that why PCB ground plane could be used=20
>as reference plane. In high speed signal case, most return current will=20
>flow just underneath the signal trace. The EM condition will be very like=
=20
>above experiment. The voltage distribution should not be ideally
=A1=B00=A1=
=B1=20
>everywhere. Understanding above case is the key to me.
>
>
>
>Thanks you!
>
>
>
>---------------------------------
>DO YOU YAHOO!?
> =D1=C5=BB=A2=C3=E2=B7=D1G=D3=CA=CF=E4=A3=AD=D6=D0=B9=FA=B5=DA=D2=BB=BE=
=F8=CE=DE=C0=AC=BB=F8=D3=CA=BC=FE=C9=A7=C8=C5=B3=AC=B4=F3=D3=CA=CF=E4
>
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