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Thread Index for si-list, 08-2003

[si-list] || [08-2003 Date Index] [08-2003 Thread Index]

  1. [SI-LIST] Re: IBIS packaging models, Robert Nowak
  2. [SI-LIST] Antw: how to start high speed PCB design ?, Robert Nowak
  3. [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator, Jack Stone
  4. [SI-LIST] Andrew B Maki/Rochester/IBM is out of the office returning on August 4th., Andrew B Maki
  5. [SI-LIST] Re: threshold and 60 Hz, boris . traa
  6. [SI-LIST] Re: Quasi Static Assumptions, Geoff Stokes
  7. [SI-LIST] board weight esitimation, Nico Fleurinck
  8. [SI-LIST] Re: threshold, Vishram Pandit
  9. [SI-LIST] Re: Microstrip Inductance (Old Wine in New Bottle), Dr. Sainath Nimmagadda
  10. [SI-LIST] [Negative Circuit elements?], You Se Ho
  11. [SI-LIST] Re: High Speed Design Books.., Steven Ding
  12. [SI-LIST] Coding theory..., Swaroop
  13. [SI-LIST] power distrbution tools, melasad2001
  14. [SI-LIST] A question about data mask in SDRAM/DDR, Jack W.C. Lin
  15. [SI-LIST] Return path and C/S Impedance, Sudheer B S
  16. [SI-LIST] connectors.., karan bagga
  17. [SI-LIST] formulas for impedance, karan bagga
  18. [SI-LIST] Re: Conversion from dB to ohm, Larry Smith
  19. [SI-LIST] Re: More High Speed Design Books, art_porter
  20. [SI-LIST] Five emerging technologies that will revolutionize high-speed systems, harry
  21. [SI-LIST] Re: Return path and C/S Impedance, Mangipudi, Prasad
  22. [SI-LIST] Re: Five emerging technologies that will revolutionize high-speed systems, Muranyi, Arpad
  23. [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Calculator, Peterson, James F (FL51)
  24. [SI-LIST] Re: [Negative Circuit elements?], Loyer, Jeff
  25. [SI-LIST] Sin(x)/x, Doug Smith
  26. [SI-LIST] HSPICE-MEASUREMENTS, manthos labropoulos
  27. [SI-LIST] Interconnect Lumped Modelling, Stradlin Donald
  28. [SI-LIST] Re: Interconnect Lumped Modelling, McCoy, Bart O.
  29. [SI-LIST] Common mode emissions, Jon Keeble
  30. [SI-LIST] Lumped Interconnect Modelling, Stradlin Donald
  31. [SI-LIST] Propagation Delay through a via, Stradlin Donald
  32. [SI-LIST] DC Resistance for PCB power plane, Narimasa Takahashi
  33. [SI-LIST] Re: Lumped Interconnect Modelling, pikeda
  34. [SI-LIST] Re: si-list Digest V3 #222, Thomas Beneken
  35. [SI-LIST] power supply, Alicia Corrales Chanca
  36. [SI-LIST] DC/DC converter output dip, Jean_Pierre . Bouthemy
  37. [SI-LIST] IA5 character, venu
  38. [SI-LIST] Re: IA5 character, Steve Rogers
  39. [SI-LIST] high speed connectors, karan bagga
  40. [SI-LIST] Re: high speed connectors, Robert Kezer
  41. [SI-LIST] Re: power supply, Pratt, Gary
  42. [SI-LIST] Question on ADS Momentum simulation, JP
  43. [SI-LIST] Re: DC/DC converter output dip, Bradley S Henson
  44. [SI-LIST] Re: Common mode emissions, Naftali Shani
  45. [SI-LIST] unsubscribe, liquadri
  46. [SI-LIST] Re: Innterconnect Lumped modeling, Moeller, Merrick
  47. [SI-LIST] Require help on GMAC MX98728 Chip, sudarshan
  48. [SI-LIST] Does Hspice can do post-simulation on PCB level?, kevin
  49. [SI-LIST] Does Hspice can do post-simulation on PCB level?, kevin
  50. [SI-LIST] MAX_CONDUCTOR_NUMBER in Hspice W element, Sogo Hsu
  51. [SI-LIST] AC overshoot, SUDHEER
  52. [SI-LIST] Re: AC overshoot, chris . mcgrath
  53. [SI-LIST] Protel vs Electronics Workbench, Chacon Simon, Geoffrey
  54. [SI-LIST] automated response, Sungmin Kim
  55. [SI-LIST] Re: Question on ADS Momentum simulation, D G
  56. [SI-LIST] Re: Protel vs Electronics Workbench, El Jefe
  57. [SI-LIST] end freelist, frits . de . jongh
  58. [SI-LIST] Re: Zodd Differential Calculation for Hspice w-element, Bill Beale
  59. [SI-LIST] test, Dorin
  60. [SI-LIST] Rf measuring, saeed keshavarz
  61. [SI-LIST] RMCEMC July Meeting Download & Pictures, Charles Grasso
  62. [SI-LIST] Marc Charbonneau/NNH/Teradyne is out of the office., marc . charbonneau
  63. [SI-LIST] PCI Prototype T1/E1 Adapter Board, Adeel Malik
  64. [SI-LIST] need help on RLGC, karan bagga
  65. [SI-LIST] Re: need help on RLGC, Steve Rogers
  66. [SI-LIST] Need help for Xtalk Problem, Suresh.K
  67. [SI-LIST] LVDS, Ryan
  68. [SI-LIST] Super IO Compatible Device, venudhar rao hajari
  69. [SI-LIST] Re: Rf measuring, McCoy, Bart O.
  70. [SI-LIST] Re: LVDS, Curt McNamara
  71. [SI-LIST] Re: Question regarding thermal layers, Ravinder . Ajmani
  72. (no subject), venu
  73. [SI-LIST] Re: (no subject), Madhu Nallu
  74. [SI-LIST] On resistance of the driver and the input capacitance of receiver, chandaharitha
  75. [SI-LIST] Re: On resistance of the driver and the input capacitance of receiver, Christopher Jakubiec
  76. [SI-LIST] Recall: Re: On resistance of the driver and the input capacitance of receiver, Kelli Caldwell
  77. [SI-LIST] Can anyone recommend a 2D extractor for on-chip tranmission line?, Bi Han
  78. [SI-LIST] Compatible Device, vamshi krishna
  79. [SI-LIST] LVPECL to SSTL and LVPECL to HSTL, Viral
  80. [SI-LIST] Re: si-list Digest V3 #231, Thomas Beneken
  81. [SI-LIST] Re: LVPECL to SSTL and LVPECL to HSTL, Chze Seong Quah
  82. [SI-LIST] cpw question?, kaustubh bhate
  83. [SI-LIST] Re: cpw question?, McCoy, Bart O.
  84. [SI-LIST] SI software question, Robison Michael R CNIN
  85. [SI-LIST] Re: SI software question, art_porter
  86. [SI-LIST] Joachim Mueller/WLGORE is out of the office., Joachim Mueller
  87. [SI-LIST] jitter on differential pairs, Denis Downey
  88. [SI-LIST] On sharing viewpoints and info, Ray Anderson
  89. [SI-LIST] Re: On sharing viewpoints and info, Lee Ritchey
  90. [SI-LIST] si-list 'Reply-to:' function now points to sender, Ray Anderson
  91. [SI-LIST] Re: si-list 'Reply-to:' function now points to sender, Ray Anderson
  92. [SI-LIST] Re: On resistance of the driver and the input capacitance of, sunil-chandra . kasanyal
  93. [SI-LIST] LVPECL standard ?, Henrik G. Madsen
  94. [SI-LIST] SI software question thanks, Robison Michael R CNIN
  95. [SI-LIST] Re: SI software question thanks, Swanson, Dan
  96. [SI-LIST] Use of package model in SPECCTRAQuest, Ravinder . Ajmani
  97. [SI-LIST] Re: terminating busses, Curt McNamara
  98. [SI-LIST] Re: LVPECL standard ?, Henrik G. Madsen
  99. [SI-LIST] Question about simulation with INTEL IBIS file, Pred
  100. [SI-LIST] Re: Question about simulation with INTEL IBIS file, Linnenbruegger Dirk
  101. [SI-LIST] Re: Use of package model in SPECCTRAQuest, Keskinen, Kai
  102. [SI-LIST] Pentium M ???, Swanson, Dan
  103. [SI-LIST] RMCEMC August meeting announcement, Grasso, Charles
  104. [SI-LIST] Re: Fieldsolvers, Sood, Nitin K. (UMR-Student)
  105. [SI-LIST] Power Integrity (was: UltraCAD ESR and Bypass Capacitor Caculator), Larry Smith
  106. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR and Bypass Capacitor Caculator), Loyer, Jeff
  107. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR andBypassCapacitor Caculator), Abe Riazi
  108. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR and Bypass Capac itor Caculator), Larry Smith
  109. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR and BypassCapacitor Caculator), Larry Smith
  110. [SI-LIST] FW: Fieldsolvers, Nitin Sood
  111. [SI-LIST] SSTL2 ClassI and ClassII, valleybird03
  112. [SI-LIST] R L & C extraction, karan bagga
  113. [SI-LIST] IEEE CPMT Society Phoenix Chapter - 9/3 meeting announcement, Sam Karikalan
  114. [SI-LIST] Re: R L & C extraction, andrew . c . byers
  115. [SI-LIST] SI software for Cadence, richard moffat
  116. [SI-LIST] Re: SI software for Cadence, Ray Anderson
  117. [SI-LIST] zero ohm jumper spice models ??, Ray Anderson
  118. [SI-LIST] About SpecctraQuest Crosstalk Simulation, 宜帆
  119. [SI-LIST] Whether can I combine deferent segments in the path description of ebd file into one, cat
  120. [SI-LIST] to calculate the cell leakage power, Naresh Gupta
  121. [SI-LIST] Re: zero ohm jumper spice models ??, Geoff Stokes
  122. [SI-LIST] field solvers, karan bagga
  123. [SI-LIST] AC coupling hspice simulation, Perry Qu
  124. [SI-LIST] Signal Integrity Engineer-Bay area 8-18, Vijay Tailor
  125. [SI-LIST] Call for Presentations - BiTS (Burn-in & Test Socket) Workshop, March 7-10 2004, Mesa Arizona, Treibergs, Valts
  126. [SI-LIST] via loss characterization, Grace Hu
  127. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR and Bypass Capacitor Caculator), Chris Cheng
  128. [SI-LIST] Re: AC coupling hspice simulation, Mellitz, Richard
  129. [SI-LIST] Sobig-F virus, richard moffat
  130. [SI-LIST] Phase/Frequency Detector!, Parthasarathy Sampath
  131. [SI-LIST] Re: Phase/Frequency Detector!, Michael Poimboeuf
  132. [SI-LIST] Re: Sobig-F virus, Ray Anderson
  133. [SI-LIST] Re: About SpecctraQuest Crosstalk Simulation, Ken Willis
  134. [SI-LIST] Switching point, super cop
  135. [SI-LIST] Re: Power Integrity (was: UltraCAD ESR and Bypass CapacitorCaculator), Vishram Pandit
  136. [SI-LIST] Die Probe Machine Users Manual manual, Arshad Suhail Farooqui
  137. [SI-LIST] Interpolative A/D, Parthasarathy Sampath
  138. [SI-LIST] characterizing interconnect structures with s-parameter, kaustubh bhate
  139. [SI-LIST] ECHO cancellation hybrid, venu
  140. [SI-LIST] Re: characterizing interconnect structures with s-parameter, Nimish Aggarwal
  141. [SI-LIST] Re: ECHO cancellation hybrid, fred . mohajer
  142. [SI-LIST] Re: DataSheet to IBIS, Ched-Chang Chai
  143. [SI-LIST] Microelectronic Packaging Class - Fall 03 at SJSU, Raj Raghuram
  144. [SI-LIST] Cadence Spectre Waveforms, Juzer Mogri
  145. [SI-LIST] HSPICE for Hyperlynx GHZ, Chris McGrath
  146. [SI-LIST] Re: Cadence Spectre Waveforms, Jacobson, Karl
  147. [SI-LIST] Airbox sensitivity for gap source port, gh c
  148. [SI-LIST] Re: DDR-II SDRAM (SSTL-18 class-II): AC-test load, mathias . borcke
  149. [SI-LIST] Transmission line behaviour of on-chip interconnects, Haritha Chanda
  150. [SI-LIST] W-element in hspice, Bi Han
  151. [SI-LIST] Re: W-element in hspice, Bi Han
  152. [SI-LIST] Ground Bounce and Bypass., John Ilett
  153. [SI-LIST] RMCEMC August Meeting Reminder, Charles Grasso
  154. [SI-LIST] UMR EMC course comes to Colorado, Charles Grasso
  155. [SI-LIST] [Fwd: PCB power distrbution analysis tools], Ekkehard Miersch
  156. [SI-LIST] AW: Re: (no subject), mathias . borcke
  157. [SI-LIST] Looking for a Job as SI/Simulation Engineer., Ravi G
  158. [SI-LIST] Transmission line behaviour on-chip interconnects, Abdulrahman Rafiq
  159. [SI-LIST] PCB Fabrication Compensation, Ravinder . Ajmani
  160. [SI-LIST] cross talk (direction of E-Filed), karan bagga
  161. [SI-LIST] placement (RF + Digital), karan bagga
  162. [SI-LIST] Via Inductance Formula Assumptions, Moeller, Merrick
  163. [SI-LIST] FEM/BEM/MOM, Ben Rothchild
  164. [SI-LIST] Re: FEM/BEM/MOM, Geoff Stokes
  165. [SI-LIST] RJ-45 JACK with Integrated Magnetics, Somashekhara Gowda B P
  166. [SI-LIST] layout recommendation?, stephanie . goedecke
  167. [SI-LIST] Re: Via Inductance Formula Assumptions, Moeller, Merrick
  168. [SI-LIST] ICX vs Spectraquest question, David Kaiser
  169. [SI-LIST] Re: heat v. radiation Re: FEM/BEM/MoM, Feldman, Richard
  170. [SI-LIST] Scaling the HSPICE netlist, Jayasree Nayar
  171. [SI-LIST] Model of Capacitors, Zhangkun
  172. [SI-LIST] PEN Leslie Margaret Mary L/Snr Assoc Engr/STATS/ST Group is out of theoffice., penlmml
  173. [SI-LIST] Regarding Signal Integrity Training, G.Ganesh Kumar
  174. [SI-LIST] Overview of Modeling Techniquess - a link, Grasso, Charles
  175. [SI-LIST] Crowbar current in push-pull drivers, Fasig, Jonathan L.
  176. [SI-LIST] High speed ADCs modelling, Julio Amoedo
  177. [SI-LIST] Re: Crowbar current in push-pull drivers, Robert Kezer
  178. [SI-LIST] Fwd: Re: heat v. radiation Re: FEM/BEM/MoM, Michael Sachtjen
  179. [SI-LIST] Serial ATA PWB Design guidelines, Grasso, Charles
  180. [SI-LIST] - Signal Integrity Web Seminar -, harry



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