FreeLists / si-list / [SI-LIST] Re: Return path and C/S Impedance

[Alan Hilton-Nickel <AHilton@xxxxxxxxxx>]

Sudheer,

What is the source of the heat you are trying to dissipate? If it is from
one of the chips on the board, I would expect an extra pair of power and
ground planes to do the job nicely. If you have a heat sink on the part that
you are connecting to the thermal planes, but isolating those planes from
the ground system, you are likely making an EMI antenna.

Depending on what your answers to the above question is, you may want to
consider this stackup:

TOP
GND
PWR
SIGv
SIGh
GND
PWR
BOT

And connect your heat sink directly to the ground planes with multiple
connection points as close as possible to the chip to minimize
inductance/loop area.

Alan Hilton-Nickel
NVIDIA Corp.,
Santa Clara

> -----Original Message-----
> From: Sudheer B S [mailto:sudheer@xxxxxxxxxxxx] 
> Sent: Monday, August 04, 2003 9:57 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Return path and C/S Impedance 
> 
> 
> Hi  All
> 
> I have  one  quection about return paths  for the  signals on 
> few routed 
> layers
> 
> 
> The  layer stackup is designed for Controlled impedance of 50 Ohms 
> (1.6mm thickness)
> 
> 
> Present stackup                         Proposed Stackup
> 
> TOP                                            TOP
> GND                                            GND
> SIGv                                           SIGv
> SIGh                                           Thermal1
> PWR                                            Thermal2
> BOT                                            SIGh
>                                                 PWR
>                                                 BOT
> ( Distance between SIGv  and SIGh  remains same in the proposed layer 
> stackup )
> 
> As per the thermal analysis inputs Two thermal layers has to 
> be added to 
> dessipate the  heat  ( meant only  for Thermal via's)
> 
> If  I introduce the two layers  between SIGv  and SIGh  ( Thermal 
> layers  not  connected Electrically  to maintain
> the same C/S Impedance of the routed signals in SIGv and SIGh 
> ) , does  this have any adverse effects on  the signals  
> return path and 
> Impedance  routed in SIGv and  SIGh ?
> where these Thermal layers can be connected  to  ? ,   the 
> chasis ?   if 
> so then it will be connected electrically
> Is this  a better idea  to preserve the  C/S Impedance of few 
> signals   ?
> 
> Any   inputs to imrpove this configuration       will be of 
> great help 
> to me :-)
> 
> Regards
> 
> SUDHEER
> 
> 
> 
> 
> 
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