FreeLists / si-list / [SI-LIST] Re: Return path and C/S Impedance

["Mangipudi, Prasad" <Prasad_Mangipudi@xxxxxxxxxxx>]

Sudheer,

The signals on SIGv are referenced to the GND plane and signals on SIGh are
referenced to the PWR plane in the present stackup given by you.  The
impedance of signals on SIGv depends on the separation between SIGv and GND
and SIGv and PWR (asymmetric stripline) and does not depend on SIGv and SIGh
separation.  The same is the case with signals on SIGh. Of course it depends
on the dielectric material used.

I would recommend the following stack up to improve thermal performance and
maintaining the impedance.  This stack up is also manufacturing friendly as
it is balanced.

Top
Thermal1
GND
SIGv
SIGh
PWR
Thermal2
Bottom

If it does not matter electrically to you where thermals are connected, then
connect them to ground. In this case you can also expect the added benefit
of power plane decoupling between adjacent PWR and GND planes for high
frequency decoupling.  In that case, the stack up can be modified to 

Top
PWR
GND(Thermal 1)
SIGv
SIGh
PWR
GND(Thermal 2)
Bottom

This provides high frequency power plane decoupling and impedance is
maintained (maintain same separation between GND - SIGv - SIGh - PWR layers
with same dielectric material).  You can also use 1 Oz copper for planes to
get some more thermal performance. Adjust the thickness between PWR and GND
planes to get overall thickness to 1.6 mm.

Hope this helps,
Prasad


-----Original Message-----
From: Sudheer B S [mailto:sudheer@xxxxxxxxxxxx]
Sent: Monday, August 04, 2003 9:57 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Return path and C/S Impedance 


Hi  All

I have  one  quection about return paths  for the  signals on few routed 
layers


The  layer stackup is designed for Controlled impedance of 50 Ohms 
(1.6mm thickness)


Present stackup                         Proposed Stackup

TOP                                            TOP
GND                                            GND
SIGv                                           SIGv
SIGh                                           Thermal1
PWR                                            Thermal2
BOT                                            SIGh
                                                PWR
                                                BOT
( Distance between SIGv  and SIGh  remains same in the proposed layer 
stackup )

As per the thermal analysis inputs Two thermal layers has to be added to 
dessipate the  heat  ( meant only  for Thermal via's)

If  I introduce the two layers  between SIGv  and SIGh  ( Thermal 
layers  not  connected Electrically  to maintain
the same C/S Impedance of the routed signals in SIGv and SIGh ) ,
does  this have any adverse effects on  the signals  return path and 
Impedance  routed in SIGv and  SIGh ?
where these Thermal layers can be connected  to  ? ,   the chasis ?   if 
so then it will be connected electrically
Is this  a better idea  to preserve the  C/S Impedance of few signals   ?

Any   inputs to imrpove this configuration       will be of great help 
to me :-)

Regards

SUDHEER





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