FreeLists / si-list / [SI-LIST] Re: IBIS packaging models

["Robert Nowak" <RNowak@xxxxxxxxxxxxx>]

Hi,

We use a cpu model for the mcf5407 from motorola.
The model confirm two files, one with the V/i table 
informations (cf5407r0.ibs) and one with the 
packaging information (cf5407r0.pkg).
I think you can use that files a guideline to create
your own models. The motorola model for the 
mcf5407 works fine with Hyperlinx.
You can download the models from the motorola 
homepage: 
http://e-www.motorola.com/files/netcomm/hardware_tools/models/ibis/MCF5407IBIS.txt
http://e-www.motorola.com/files/netcomm/hardware_tools/models/ibis/MCF5407PKG.txt
Good Luck

Regards

Robert


>>> rrapport@xxxxxxxxxxx 07/31 10:03  >>>
I have a customer request for an IBIS package model for a stacked TSOP

DRAM. In the past, I have modified each customer's TSOP (single 
unstacked IC) model by essentially doubling the component parasitics, 
creating new model sections for the unique chip select pins, and
setting 
the package parasitics to match the final packaging parasitics from the

original TSOP packaging plus our added parasitics. Is there a way to 
create a standard, standalone package model? Note that in our case, we

would have one package model which would link to or work with two or 
more instances of an unmodified DRAM model. Could this be used by all 
major IBIS simulators (we use Hyperlynx)? Can anyone supply an example,

and describe any customer issues with its ease-of-use? Thanks in
advance 
for all help.

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