Date Index for si-list, 08-2001

[si-list] || [08-2001 Date Index] [08-2001 Thread Index]

[SI-LIST] Re: Placement of decoupling capacitors - Greim, Michael
[SI-LIST] Re: Placement of decoupling capacitors - FLOWERDEW, Peter
[SI-LIST] Re: Vp on serpentine - Ingraham, Andrew
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Dr. Edward P. Sayre
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Knighten, Jim L
[SI-LIST] VGA/VIDEO: IMPEDANCE & LENGTH - Chandan
[SI-LIST] Re: Placement of decoupling capacitors - Khalid Ansari
[SI-LIST] Re: Vp on serpentine - Haller, Robert
[SI-LIST] Re: Vp on serpentine - Mellberg Hans
[SI-LIST] Re: Placement of decoupling capacitors - Chris Cheng
[SI-LIST] Re: IBIS and device performance - Roy_Leventhal
[SI-LIST] Re: VGA/VIDEO: IMPEDANCE & LENGTH - stephanie . k . goedecke
[SI-LIST] Re: VGA/VIDEO: IMPEDANCE & LENGTH - stephanie . k . goedecke
[SI-LIST] Deriving Output Hold Times - Chris Bobek
[SI-LIST] pci driver strength - IVOR TING
[SI-LIST] Re: VGA/VIDEO: IMPEDANCE & LENGTH - Chandan
[SI-LIST] Re: pci driver strength - Ingraham, Andrew
[SI-LIST] Re: Deriving Output Hold Times - Ingraham, Andrew
[SI-LIST] Re: pci driver strength - Peterson, James F (FL51)
[SI-LIST] Re: pci driver strength - Peterson, James F (FL51)
[SI-LIST] Scope probe attenuation - Adam Klein
[SI-LIST] Crystal Oscillators - Steinkogler, Gary
[SI-LIST] OSCILLATOR PHASE NOISE AND LEESON'S EQUATION - Steve Rogers
[SI-LIST] Re: OSCILLATOR PHASE NOISE AND LEESON'S EQUATION - tim stroud
[SI-LIST] Re: OSCILLATOR PHASE NOISE AND LEESON'S EQUATION - Ingraham, Andrew
[SI-LIST] Looking for InfiniBand info/parts/IP/etc. - Zabinski, Patrick J.
[SI-LIST] Re: Scope probe attenuation - Degerstrom, Michael J.
[SI-LIST] Re: Scope probe attenuation - David Instone
[SI-LIST] Re: Scope probe attenuation - Degerstrom, Michael J.
[SI-LIST] HSpice IBIS Input/Output Buffer syntax - Patrick_Carrier
[SI-LIST] Re: HSpice IBIS Input/Output Buffer syntax - Adam . Tambone
[SI-LIST] Re: Scope probe attenuation - Ingraham, Andrew
[SI-LIST] Eagle Cad tools and Allegro or other design tools - BIBICHA
[SI-LIST] Re: HSpice IBIS Input/Output Buffer syntax - Ingraham, Andrew
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Doug McKean
[SI-LIST] setup & hold Time for source synchronous - Issa, Elie
[SI-LIST] Board Design Training Series - Gary Otonari
[SI-LIST] Re: OSCILLATOR PHASE NOISE AND LEESON'S EQUATION - Paul Levin
[SI-LIST] Re: setup & hold Time for source synchronous - Lai, Ricky (Eng Hou)
[SI-LIST] Re: HSpice IBIS Input/Output Buffer syntax - Adam . Tambone
[SI-LIST] Re: HSpice IBIS Input/Output Buffer syntax - Patrick_Carrier
[SI-LIST] Re: setup & hold Time for source synchronous - Issa, Elie
[SI-LIST] Trace layout - Khalid Ansari
[SI-LIST] SSTL-2 ClassII termination. - rajat . chauhan
[SI-LIST] Re: SSTL-2 ClassII termination. - D. C. Sessions
[SI-LIST] Reflection on Lattice and Bergeron Diagrams - Abe Riazi
[SI-LIST] Immunity troubleshooting technique - Douglas C. Smith
[SI-LIST] Question about Simulation in Spectraquest - whiz kid
[SI-LIST] Re: Question about Simulation in Spectraquest - Carlos Moll
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Mary
[SI-LIST] Re: Question about Simulation in Spectraquest - Todd Westerhoff
[SI-LIST] Re: Question about Simulation in Spectraquest - Coleman, Dave
[SI-LIST] Re: Trace layout - Hassan Ali
[SI-LIST] Re: setup & hold Time for source synchronous - Lai, Ricky (Eng Hou)
[SI-LIST] micro coax cables - Ravikumar Chirugudu
[SI-LIST] Re: Reflection on Lattice and Bergeron Diagrams - abe riazi
[SI-LIST] Simulation Question in Spectra Quest. - whiz kid
[SI-LIST] Re: setup & hold Time for source synchronous - Issa, Elie
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Doug McKean
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Steve Corey
[SI-LIST] Re: setup & hold Time for source synchronous - S. Weir
[SI-LIST] Re: Question about Simulation in Spectraquest - Venkataraman, Srinivas
[SI-LIST] Re: Question about Simulation in Spectraquest - James Freeman
[SI-LIST] Re: Question about Simulation in Spectraquest - Todd Westerhoff
[SI-LIST] Re: Question about Simulation in Spectraquest - Venkataraman, Srinivas
[SI-LIST] Re: Question about Simulation in Spectraquest - Chris Cheng
[SI-LIST] ansoft spicelink training manual - bally
[SI-LIST] Re: ansoft spicelink training manual - Paul Link
[SI-LIST] Re: Question about Simulation in Spectraquest - Todd Westerhoff
[SI-LIST] HSTL to LVTTL translation - Bastola, Subas
[SI-LIST] U and E - Rich Peyton
[SI-LIST] Re: ansoft spicelink training manual - James Freeman
[SI-LIST] Re: U and E - Mellberg Hans
[SI-LIST] Re: U and E - Shabbir
[SI-LIST] Re: U and E - Greim, Michael
[SI-LIST] Trace layout - Khalid Ansari
[SI-LIST] High Frequency/High Speed ... - Doug McKean
[SI-LIST] Re: Simulation Question in Spectra Quest. - Heiko Dudek
[SI-LIST] Re: Controlled impedance test requirement - Dave Hoover
[SI-LIST] jitter introduced by a mated connector - Kowal, Keith
[SI-LIST] PCI debugging - Patel, Bhavesh
[SI-LIST] Re: PCI debugging - Michael Nudelman
[SI-LIST] Gigabit fiber transceivers, EMI, trace lengths, and... antennas. - Kolstad, Joel (EIP)
[SI-LIST] Re: Gigabit fiber transceivers, EMI, trace lengths, and... antennas. - Doug McKean
[SI-LIST] Re: Question about Simulation in Spectraquest - Scott McMorrow
[SI-LIST] HSTL for Differential signalling - rajesh . narwal
[SI-LIST] Can SPICE model CMOS latch-up? - Baoshu XU
[SI-LIST] Re: jitter introduced by a mated connector - Kai Keskinen
[SI-LIST] Re: Can SPICE model CMOS latch-up? - Bill . Cohen
[SI-LIST] EMI, trace lenghts etc..... antennas. - Charles Grasso
[SI-LIST] Re: HSTL for Differential signalling - Vinu Arumugham
[SI-LIST] Re: Question about Simulation in Spectraquest - Scott McMorrow
[SI-LIST] Re: Question about Simulation in Spectraquest - Chris Cheng
[SI-LIST] Re: Question about Simulation in Spectraquest - Jonathan Dowling
[SI-LIST] Re: HSTL for Differential signalling - rajesh . narwal
[SI-LIST] Re: Question about Simulation in Spectraquest - Scott McMorrow
[SI-LIST] Re: Question about Simulation in Spectraquest - Jonathan Dowling
[SI-LIST] Timing Methodology (renamed from Question about Simulation in Spectraquest) - Scott McMorrow
[SI-LIST] Resistance - Zhou, Xingling (Xingling)
[SI-LIST] Abstracts sought for upcoming conference - rfaries
[SI-LIST] Re: Resistance - Chung, Chee Yee
[SI-LIST] Antwort: Re: Resistance - Andreas_Lenkisch
[SI-LIST] Re: jitter introduced by a mated connector - Ken Cantrell
[SI-LIST] Re: jitter introduced by a mated connector - Kowal, Keith
[SI-LIST] Units Conversion Question - Chris Padilla
[SI-LIST] Re: jitter introduced by a mated connector - Kai Keskinen
[SI-LIST] Re: Resistance - Aubrey_Sparkman
[SI-LIST] Soliciting feedback - latest tool versions - Todd Westerhoff
[SI-LIST] Re: jitter introduced by a mated connector - Ken Cantrell
[SI-LIST] Re: Resistance - Ray Anderson
[SI-LIST] Re: Resistance - Greim, Michael
[SI-LIST] Re: Units Conversion Question - Rob Hinz
[SI-LIST] Re: Units Conversion Question - Doug McKean
[SI-LIST] Re: Units Conversion Question - Wang Xiao-yun
[SI-LIST] Re: Timing Methodology (renamed from Question about Simulation in Spectraquest) - Jonathan Dowling
[SI-LIST] Re: Resistance - Aubrey_Sparkman
[SI-LIST] Re: Timing Methodology (renamed from Question about Simulation in Spectraquest) - Scott McMorrow
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Michael Schmitt
[SI-LIST] Re: EMI and Power plane card edge clearance distance - John Phillips
[SI-LIST] Re: EMI and Power plane card edge clearance distance - Greim, Michael
[SI-LIST] Re: Timing Methodology (renamed from Question about Simulation in Spectraquest) - Ken Cantrell
[SI-LIST] Re: Question about Simulation in Spectraquest - Chris Cheng
[SI-LIST] Re: Timing Methodology - Jonathan Dowling
[SI-LIST] Re: Timing Methodology - Chris Cheng
[SI-LIST] Re: Timing Methodology - Ken Cantrell
[SI-LIST] Re: Timing Methodology - Chris Cheng
[SI-LIST] Re: Simulation Question in Spectra Quest. - Sivakumar S.
[SI-LIST] Re: Simulation Question in Spectra Quest. - Mike LaBonte
[SI-LIST] Re: Timing Methodology - Jonathan Dowling
[SI-LIST] Looking for dist or Rep who offers cut tape for kemet T510 SMT tants - Greim, Michael
[SI-LIST] Info - Steve Gonzales
[SI-LIST] Open Position - Hemant Shah
[SI-LIST] question concerning a PowerPC740 - jan . vercammen . jv1
[SI-LIST] Decoupling capacitor placement - Wei_Chen
[SI-LIST] HANDLING HIGH-SPEED BURSTs - Lyke James Civ AFRL/VSSE
[SI-LIST] Re: HANDLING HIGH-SPEED BURSTs - Kowal, Keith
[SI-LIST] Re: Decoupling capacitor placement - Chung, Chee Yee
[SI-LIST] Re: Decoupling capacitor placement - cadpro2k
[SI-LIST] Re: HANDLING HIGH-SPEED BURSTs - Vinu Arumugham
[SI-LIST] Bond Wire Length - Smith, Norm W
[SI-LIST] Re: Decoupling capacitor placement - Mellberg Hans
[SI-LIST] Re: Bond Wire Length - Neeraj Pendse
[SI-LIST] Re: Bond Wire Length - Smith, Norm W
[SI-LIST] Re: Bond Wire Length - Neeraj Pendse
[SI-LIST] IBIS model. - fname lname
[SI-LIST] How does the loading affects the rise time of a PAD? - C.Y. Cheng
[SI-LIST] Re: IBIS model. - Adam . Tambone
[SI-LIST] Flux residue on coax cable - Rich Peyton
[SI-LIST] Re: IBIS model. - Ingraham, Andrew
[SI-LIST] Re: How does the loading affects the rise time of a PAD? - Vinu Arumugham
[SI-LIST] How does the loading affects the rise time of a PAD? - C.Y. Cheng
[SI-LIST] Re: Flux residue on coax cable - Rich Peyton
[SI-LIST] Re: How does the loading affects the rise time of a PAD? - Michael Nudelman
[SI-LIST] Re: Flux residue on coax cable - Mike Hughes
[SI-LIST] Re: Flux residue on coax cable - Efren Serra
[SI-LIST] Re: Flux residue on coax cable - Rich Peyton
[SI-LIST] Double messages - Rich Peyton
[SI-LIST] Re: Flux residue on coax cable - Mike Hughes
[SI-LIST] Re: Double messages - Neeraj Pendse
[SI-LIST] alternate subscribe/unsubscribe method for si-list - raymonda
[SI-LIST] logic analyser measurements at a Controller with 100MHz busses - Roehrner Wolfgang
[SI-LIST] FW: Announcing a Signal Integrity TC within the EMC Society - Charles Grasso
[SI-LIST] Re: How does the loading affects the rise time of a PAD? - Peterson, James F (FL51)
[SI-LIST] Re: How does the loading affects the rise time of a PAD ? - Greim, Michael
[SI-LIST] Re: How does the loading affects the rise time of a PAD? - Ingraham, Andrew
[SI-LIST] Re: How does the loading affects the rise time of a PAD ? - David Kaiser
[SI-LIST] PCB West 2002 Call for Abstracts - rfaries
[SI-LIST] Books on SI Model Development and EMI - Farooq Bhatti
[SI-LIST] Re: Books on SI Model Development and EMI - Abdulrahman Rafiq
[SI-LIST] Re: IBIS model. - abe riazi
[SI-LIST] Re: How does the loading affects the rise time of a PAD ? - Ingraham, Andrew
[SI-LIST] Re: IBIS model. - Adam . Tambone
[SI-LIST] Differential closk wiring - BIBICHA
[SI-LIST] Differential closk wiring (with no typos :) - BIBICHA
[SI-LIST] Re: Differential closk wiring (with no typos :) - Greim, Michael
[SI-LIST] Re: IBIS model. - Abe Riazi
[SI-LIST] CPW r.o.t? - Grossman, Brett
[SI-LIST] Re: CPW r.o.t? - Scott McMorrow
[SI-LIST] Re: CPW r.o.t? - Scott McMorrow
[SI-LIST] Re: CPW r.o.t? - Jeff Walden
[SI-LIST] Re: CPW r.o.t? - Raymond W. Waugh
[SI-LIST] Re: CPW r.o.t? - Raymond W. Waugh
[SI-LIST] Re: CPW r.o.t? - Grossman, Brett
[SI-LIST] Resistor Network - Patrick Vincent
[SI-LIST] Re: Resistor Network - Michael Nudelman
[SI-LIST] Re: Resistor Network - Mark Kanda
[SI-LIST] Re: Resistor Network - Scott McMorrow
[SI-LIST] Clock quality - Patel, Bhavesh
[SI-LIST] The doctor's course about SI. - Inmyung Song
[SI-LIST] 100BASE-TX's IBIS model? - Inmyung Song
[SI-LIST] Re: 100BASE-TX's IBIS model? - Drew
[SI-LIST] Re: 100BASE-TX's IBIS model? - Ingraham, Andrew
[SI-LIST] Re: Flux residue on coax cable - Alan Hussey
[SI-LIST] The PLL simulations - chen, jinhua
[SI-LIST] Re: 100BASE-TX's IBIS model? - Julian Ferry
[SI-LIST] Re: The PLL simulations - Ingraham, Andrew
[SI-LIST] Re: The PLL simulations - H H Goh
[SI-LIST] Differential delay line sim models - Bastola, Subas
[SI-LIST] 100BASE-TX's IBIS Model? - Inmyung Song
[SI-LIST] The Doctor course of SI? - Inmyung Song
[SI-LIST] SPICE vs IBIS - Viral
[SI-LIST] Re: The PLL simulations - Steve Rogers
[SI-LIST] Re: The PLL simulations - chen, jinhua
[SI-LIST] Re: The PLL simulations - Zabinski, Patrick J.
[SI-LIST] 2001 RMCEMC Symposium Advance Notice - Charles Grasso
[SI-LIST] Re: SPICE vs IBIS - Kim Helliwell
[SI-LIST] FW: Copper interface cable proposal - Tegan Campbell
[SI-LIST] Re: FW: Copper interface cable proposal - Rich Peyton
[SI-LIST] unused clocks - v r
[SI-LIST] PECL to SSTL2 clock driver - ruston, matt
[SI-LIST] Re: PECL to SSTL2 clock driver - D. C. Sessions
[SI-LIST] SPICE vs IBIS - Lynne Green
[SI-LIST] Re: PECL to SSTL2 clock driver - S. Weir
[SI-LIST] Re: The PLL simulations - Chris Cheng
[SI-LIST] Re: SPICE vs IBIS - Scott McMorrow
[SI-LIST] Re: FW: Copper interface cable proposal - David Instone
[SI-LIST] IDC capacitor - Haller, Robert
[SI-LIST] Measuring 1.25Gbps differential signals - Triggering Problem - salvador JR
[SI-LIST] PCI at 66 Mhz - Hemant Fulsunge
[SI-LIST] Re: FW: Copper interface cable proposal - Jay Diepenbrock
[SI-LIST] Re: PCI at 66 Mhz - Michael Nudelman
[SI-LIST] Re: FW: Copper interface cable proposal - David Instone
[SI-LIST] Re: PCI at 66 Mhz - Ingraham, Andrew
[SI-LIST] Re: FW: Copper interface cable proposal - Rich Peyton
[SI-LIST] Re: FW: Copper interface cable proposal - Doug Hopperstad
[SI-LIST] Re: unused clocks - Ingraham, Andrew
[SI-LIST] Re: FW: Copper interface cable proposal - Doug Hopperstad
[SI-LIST] Re: [Fwd: Re: FW: Copper interface cable proposal] - Dima Smolyansky
[SI-LIST] Re: PCI at 66 Mhz - David Instone
[SI-LIST] Re: PCI at 66 Mhz - James Tidman
[SI-LIST] Re: PCI at 66 Mhz - Chan, Michael
[SI-LIST] Re: PCI at 66 Mhz - Michael Nudelman
[SI-LIST] Re: PCI at 66 Mhz - Ingraham, Andrew
[SI-LIST] non-negative off diagonal capacitive matrix elements ?? - Ray Anderson
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Jian-X. Zheng
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Zhou, Xingling (Xingling)
[SI-LIST] Spice simulators - Alex Horvath
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Zhou, Xingling (Xingling)
[SI-LIST] Relative merits of Spice vs. IBIS - Alex Horvath
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Zabinski, Patrick J.
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Jian-X. Zheng
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Neeraj Pendse
[SI-LIST] Re: Relative merits of Spice vs. IBIS - Alex Horvath
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Zhou, Xingling (Xingling)
[SI-LIST] Re: Relative merits of Spice vs. IBIS - Greim, Michael
[SI-LIST] Spice simulators - mmunroe
[SI-LIST] Self Inductance and TDR measurements - Anil Pannikkat
[SI-LIST] Re: Spice simulators - Dima Smolyansky
[SI-LIST] Re: Self Inductance and TDR measurements - Zabinski, Patrick J.
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Raj Raghuram
[SI-LIST] Re: non-negative off diagonal capacitive matrix elements ?? - Ray Anderson