FreeLists / si-list / [SI-LIST] clocks,caps&hspice!

["john smith" <pranksteroma@xxxxxxxxx>]

Hi Guys,
Is the 'clock signal' driven by a buffer?

Why do we use capacitors as loads, wont they load the driving ckt like
resistors?

And in hspice does the simulator automatically connect an infinite resistor
to open ends?

Thanks,
JS


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