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[SI-LIST] SSN
- From: "smartliu" <liushuyao0825@xxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 5 Jul 2007 22:43:24 +0800
Hi All£º
I have a puzzle about SSN,As we know SSN is a infrequent probability
affair£¬Whether we will pay more attention
on SSN in our design. How to evaluate the probability of 30 or 50 I/O buffers
turn to high or low at the same time£¿
Which one is bigger£¿ The probability of 30 or 50 I/O buffers turn to high
at the same time or the probability
of IC invalidation? If we can't evaluate the probability of 30 or 50 IO buffers
turn to high at the same time,what is
the meaning of simulating the SSN?
A few years ago,there are some SSN problem in our logic design.We put more
GND or POWER pins in the same bank this year£¬
the SSN will not appear again in our products.That is to say I should not acare
the SSN problem now,Am I right?
If some one did some good ensample on the SSN,will you share with me some
advice
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