FreeLists / si-list / [SI-LIST] IBIS about differential output

[<TerenceHsieh@xxxxxxxxxxxx>]

HI all
   I have a problem. When I generate an IBIS model for PCI-E driver. I
generate single output

IBIS model and use the model to do differential signal. 

I use [Diff Pin] keyword to do the differential output model.

When I simulation the IBIS file, I find that the common mode voltage
between positive node

and negative node is different that is the two output nodes have voltage
offset. How could I 

solve this problem? Thanks.

 

 


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