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[SI-LIST] Re: R: Too much predicted loss
- From: Istvan novak <istvan.novak@xxxxxxx>
- To: Giovanni.Guasti@xxxxxxxxxx
- Date: Wed, 13 Jul 2005 08:52:26 -0400
Well, 8dB sounds like a lot, but the first questions in my mind:
- at what frequency?
- for what length?
- with what kind of connections at the ends?
Regards,
Istvan Novak
SUN MIcrosystems
Guasti Giovanni wrote:
>I don't think a little change in dielectric thickness could change =
>losses of 8dB.
>What about the real thickness of copper? depending on pcb manufacturer, =
>layers where via and buried holes start and end increase their thickness =
>(for example top and bottom) for exampre from 18um to 30-40um. So losses =
>can reduce if your traces are on that kind of layers.
>Hope this help
> Giovanni
>
>
>
>-----Messaggio originale-----
>Da: You, Yang [mailto:yang.you@xxxxxx]
>Inviato: marted=EC 12 luglio 2005 18.10
>A: si-list@xxxxxxxxxxxxx
>Oggetto: [SI-LIST] Too much predicted loss
>
>
>Hi,
> I'm working with the SIWave software on a board with some
>test traces but the results of the simulation indicate about 8 db more
>loss than is actually seen in the lab on the actual board. I imported
>the board directly from the layout tool and setup the stackup but I
>think the dielectric layers I specified might be a little thinner than
>on the actual board. Would that cause more loss to show up in the
>s-parameters? What other factors might be contributing to this? Thanks
>for your help.
>
>=20
>
>Yang You
>
>=20
>
>Texas Instruments, Inc.
>
>
>
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