Date Index for si-list, 07-2004

[si-list] || [07-2004 Date Index] [07-2004 Thread Index]

[SI-LIST] Re: si-list Digest V4 #261 - Ivan Ndip
[SI-LIST] Re: si-list Digest V4 #261 - Geoff Stokes
[SI-LIST] Re: si-list Digest V4 #261 - giancarlo guida
[SI-LIST] Ansoft's SI-wave? - Robert Tso
[SI-LIST] Field coupling from an impulse event - Doug Smith
[SI-LIST] High Speed PCB design standards - vishnu.jwalapuram
[SI-LIST] Need to buy standards book or manual - kirana na
[SI-LIST] Re: Need to buy standards book or manual - Geoff Stokes
[SI-LIST] Re: High Speed PCB design standards - Nilesh Kawadkar
[SI-LIST] Re: Need to buy standards book or manual - S.L.N.Murthy
[SI-LIST] Re: High Speed PCB design standards - Lee Ritchey
[SI-LIST] Re: Ansoft's SI-wave? - Raj Raghuram
[SI-LIST] six layer, eight layer, other - calaf_calaf_calaf
[SI-LIST] Re: six layer, eight layer, other - steve weir
[SI-LIST] Re: Need to buy standards book or manual - Mitch S. Morey
[SI-LIST] Re: si-list Digest V4 #261 - Ivan Ndip
[SI-LIST] Re: Differential pair via modeling - Doug Hopperstad
[SI-LIST] Re: Differential pair via modeling - zhangkun 29902
[SI-LIST] Course on Signal Integrity at San Jose State University - Ji Zheng
[SI-LIST] Re: six layer, eight layer, other - calaf_calaf_calaf
[SI-LIST] spliting lvds clk - Moshe Frid
[SI-LIST] Re: spliting lvds clk - steve weir
[SI-LIST] Re: Differential pair via modeling - Ivan Ndip
[SI-LIST] Re: High Speed PCB design standards - Nick Paulter
[SI-LIST] Re: High Speed PCB design standards - Scott McMorrow
[SI-LIST] Re: High Speed PCB design standards - Nick Paulter
[SI-LIST] Is Impedance Enough for Describing the PDS? - zhangkun 29902
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - steve weir
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Zhangkun
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Brent DeWitt
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Ray Anderson
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Abhijit Mahajan
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - steve weir
[SI-LIST] Loading IBIS in Signoise! - G.Srinivasan
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - giancarlo guida
[SI-LIST] Re: Loading IBIS in Signoise! - Henrik G. Madsen
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Zhangkun
[SI-LIST] a problem in simulate crystal oscillator - zyq
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Zhangkun
[SI-LIST] Re: a problem in simulate crystal oscillator - Ingraham, Andrew
[SI-LIST] Re: High Speed PCB design standards - Lee Ritchey
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Xin Wu
[SI-LIST] add new power island in a 8 layer stack - calaf_calaf_calaf
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Scott McMorrow
[SI-LIST] balun theory - atifshamim khan
[SI-LIST] Re: balun theory - Paul Levin
[SI-LIST] Re: balun theory - Mike Brown
[SI-LIST] Re: add new power island in a 8 layer stack - steve weir
[SI-LIST] Re: add new power island in a 8 layer stack - Tom Biggs
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - steve weir
[SI-LIST] Re: balun theory - Jon Powell
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Vijay B
[SI-LIST] Re: a problem in simulate crystal oscillator - zyq
[SI-LIST] Re: balun theory - Ingraham, Andrew
[SI-LIST] Re: High Speed PCB design standards - Nick Paulter
[SI-LIST] RMCEMC June presentation download available - Grasso, Charles
[SI-LIST] The future of si-list - Ray Anderson
[SI-LIST] many irregular Tr-Line and smash GND Plane - webhugo
[SI-LIST] Re: add new power island in a 8 layer stack - Budathoki, Trilok (GE Consumer & Industrial)
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - boris . traa
[SI-LIST] Re: si-list Digest V4 #261 - Geoff Stokes
[SI-LIST] Just Testing - Hitendra Patel
[SI-LIST] Re: balun theory - Fasig, Jonathan L.
[SI-LIST] High Speed Termination - Hitendra Patel
[SI-LIST] Re: High Speed Termination - michael munroe
[SI-LIST] PCB rework speciality houses - Naveen Reddy
[SI-LIST] Vector Fitting Matlab Code Request - sam BB
[SI-LIST] IBIS models for Pb-free (lead-free) BGA package - Giulio Tamberi
[SI-LIST] Re: Vector Fitting Matlab Code Request - Ray Anderson
[SI-LIST] noise measurement literature - yue xing li
[SI-LIST] why the step should be 0.05ns? - zyq
[SI-LIST] Naveen Reddy - Deac Descoteaux
[SI-LIST] Re: why the step should be 0.05ns? - Brent DeWitt
[SI-LIST] DDR point to point termination - Aric Hadav
[SI-LIST] Re: The future of si-list - JESA
[SI-LIST] Re: DDR point to point termination - Landrum, Chris
[SI-LIST] Re: DDR point to point termination - Gil Gafni
[SI-LIST] Re: The future of si-list - Ray Anderson
[SI-LIST] Re: DDR point to point termination - Peterson, James F (FL51)
[SI-LIST] Re: DDR point to point termination - Chris McGrath
[SI-LIST] Re: High Speed Termination - Hitendra Patel
[SI-LIST] R: IBIS models for Pb-free (lead-free) BGA package - Giulio Tamberi
[SI-LIST] Re: DDR point to point termination - Gil Gafni
[SI-LIST] Re: DDR point to point termination - Chris McGrath
[SI-LIST] A question in 2D Extractor & HFSS - yf_xie
[SI-LIST] Automotive ECU EMI problems - Daniel R. Nicoson
[SI-LIST] Re: Automotive ECU EMI problems - steve weir
[SI-LIST] Re: A question in 2D Extractor & HFSS - giancarlo guida
[SI-LIST] Re: DDR point to point termination - Fraiman Edi-BEF012
[SI-LIST] Re: why the step should be 0.05ns? - zyq
[SI-LIST] Re: DDR point to point termination - Peterson, James F (FL51)
[SI-LIST] Via Impedance! - G.Srinivasan
[SI-LIST] diffusion capacitance measurement - ashvin khole
[SI-LIST] Allegro - pentsapor
[SI-LIST] New 2004 textbook out on high-speed design and signal integrity - Tom Granberg
[SI-LIST] Re: Allegro - Christian Trudeau
[SI-LIST] Re: New 2004 textbook out on high-speed design and signal integrity - Craig Clewell
[SI-LIST] Re: New 2004 textbook out on high-speed design and signal integrity - Ken Cantrell
[SI-LIST] Re: Via Impedance! - Lee Ritchey
[SI-LIST] Re: PCB rework speciality houses - Fred Townsend
[SI-LIST] Re: Allegro - Dan Bostan
[SI-LIST] Re: Allegro - Gabriel T Martin
[SI-LIST] FW: Allegro - Gary Schneider
[SI-LIST] Re: PCB rework speciality houses - Eric Steimle
[SI-LIST] HSPICE question - Muranyi, Arpad
[SI-LIST] Re: Allegro - Dan Bostan
[SI-LIST] Re: HSPICE question - Craig Clewell
[SI-LIST] Re: HSPICE question - Tracy Barclay
[SI-LIST] Re: diffusion capacitance measurement - Raymond . Leung
[SI-LIST] Re: DDR point to point termination - Jim Antonellis
[SI-LIST] Re: DDR point to point termination - Mike Brown
[SI-LIST] Re: diffusion capacitance measurement - Yafei Bi
[SI-LIST] Re: diffusion capacitance measurement - Raymond . Leung
[SI-LIST] Re: diffusion capacitance measurement - Yafei Bi
[SI-LIST] Re: Allegro - Crazy Engineer
[SI-LIST] Heatsink acting as EMI shield. - Budathoki, Trilok (GE Consumer & Industrial)
[SI-LIST] Re: Heatsink acting as EMI shield. - giancarlo guida
[SI-LIST] R: Re: Via Impedance! - Guasti Giovanni
[SI-LIST] Re: Heatsink acting as EMI shield. - Zhangkun
[SI-LIST] Re: Heatsink acting as EMI shield. - steve weir
[SI-LIST] Re: Heatsink acting as EMI shield. - giancarlo guida
[SI-LIST] Re: Allegro - Alistair Soup
[SI-LIST] Can SSTL float? - Peterson, James F (FL51)
[SI-LIST] The function of damping resistor between MCH and DIMM slot - Jie J. Zhou
[SI-LIST] Re: si-list Digest V4 #261 - Ivan Ndip
[SI-LIST] Re: si-list Digest V4 #261 - David Siadat
[SI-LIST] Re: DDR point to point termination - Gil Gafni
[SI-LIST] Re: si-list Digest V4 #261 - andrew . c . byers
[SI-LIST] Re: Via modeling & de-embedding - Hassan O. Ali
[SI-LIST] IBIS file data - Pay Chee How
[SI-LIST] Re: Via Impedance! - Gregory R Edlund
[SI-LIST] Re: IBIS file data - Lynne Green
[SI-LIST] Re: si-list Digest V4 #261 - Tom Dagostino
[SI-LIST] Re: si-list Digest V4 #261 - Coleman, Dave
[SI-LIST] Re: Heatsink acting as EMI shield. - hansm
[SI-LIST] Ground bounce - Ramkrishna Reddy
[SI-LIST] Re: Heatsink acting as EMI shield. - Brent DeWitt
[SI-LIST] Re: Ground bounce - Jim Antonellis
[SI-LIST] 回信： Ground bounce - Jie J. Zhou
[SI-LIST] Hspice with IBIS model containing driver schedule - John Lin (林朝煌)
[SI-LIST] Re: Hspice with IBIS model containing driver schedule - slwu
[SI-LIST] R: Hspice with IBIS model containing driver schedule - Guasti Giovanni
[SI-LIST] Re: Via modeling & de-embedding - Ivan Ndip
[SI-LIST] Re: Hspice with IBIS model containing driver schedule - Linnenbruegger Dirk
[SI-LIST] Re: Via modeling & de-embedding - giancarlo guida
[SI-LIST] Re: Via Impedance! - Ken Willis
[SI-LIST] Re: Allegro - John Matthews
[SI-LIST] Hi,dear all:What's the function of damping resistor between MCH and DIMM slot? Only reduce current? - Jie J. Zhou
[SI-LIST] Re: Via modeling & de-embedding - Hassan O. Ali
[SI-LIST] Re: Via modeling & de-embedding - Hassan O. Ali
[SI-LIST] Re: Via modeling & de-embedding - David Siadat
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Larry Smith
[SI-LIST] Re: Via modeling & de-embedding - Craig Clewell
[SI-LIST] Re: Ground bounce - Raymond Y. Chen
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Chris Cheng
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Ray Anderson
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - steve weir
[SI-LIST] Dear, can anybody tell me what's the max overshoot and min undershoot value of PCI? thank you! - Jie J. Zhou
[SI-LIST] primary question about spread spectrum clock - zhangkun 29902
[SI-LIST] Re: primary question about spread spectrum clock - steve weir
[SI-LIST] Re: primary question about spread spectrum clock - Lynne Green
[SI-LIST] guard traces (huge) - Moshe Frid
[SI-LIST] What is ASTAP? - zhangkun 29902
[SI-LIST] Re: What is ASTAP? - Ray Anderson
[SI-LIST] Re: guard traces (huge) - Istvan NOVAK
[SI-LIST] Re: guard traces (huge) - Moshe Frid
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Istvan NOVAK
[SI-LIST] Re: guard traces (huge) - Istvan NOVAK
[SI-LIST] Re: PCB rework speciality houses - ludvik
[SI-LIST] Re: guard traces (huge) - Lynne Green
[SI-LIST] Re: Digest Number 1151 - Shalini S
[SI-LIST] Re: Allegro - G.Srinivasan
[SI-LIST] Re: Allegro - Mahesh Chandra
[SI-LIST] Re: guard traces (huge) - Budathoki, Trilok (GE Consumer & Industrial)
[SI-LIST] Re: Via modeling & de-embedding - Geoff Stokes
[SI-LIST] Return path - Budathoki, Trilok (GE Consumer & Industrial)
[SI-LIST] Re: Return path - steve weir
[SI-LIST] Re: Return path - Sudheer, Beligere (IE10)
[SI-LIST] AW: Return path - Masoud Raeisi
[SI-LIST] Re: Return path - Budathoki, Trilok (GE Consumer & Industrial)
[SI-LIST] How to measure voltage drop on plane - Zhangkun
[SI-LIST] Re: Via modeling & de-embedding - David Siadat
[SI-LIST] Re: guard traces (huge) - Edwin Bennett
[SI-LIST] Re: Via modeling & de-embedding - package_char
[SI-LIST] Re: How to measure voltage drop on plane - Ray Anderson
[SI-LIST] TDR on Package only - Porsh Shih
[SI-LIST] Re: TDR on Package only - Tom Dagostino
[SI-LIST] Re: How to measure voltage drop on plane - zhangkun 29902
[SI-LIST] Re: How to measure voltage drop on plane - Russell D. Moser
[SI-LIST] Re: How to measure voltage drop on plane - steve weir
[SI-LIST] Re: How to measure voltage drop on plane - ronald miller
[SI-LIST] IBIS Open_source and ECL models - Xiaoling Huang
[SI-LIST] 回信： How to measure voltage drop on plane - Jie J. Zhou
[SI-LIST] (no subject) - Ritika DUA
[SI-LIST] Re: How to measure voltage drop on plane - Geoff Stokes
[SI-LIST] Re: Via modeling & de-embedding - Geoff Stokes
[SI-LIST] Re: How to measure voltage drop on plane - steve weir
[SI-LIST] Re: Is Impedance Enough for Describing the PDS? - Chris Cheng
[SI-LIST] PCI - Ritika DUA
[SI-LIST] SSTL Standard - Ritika DUA
[SI-LIST] LVTTL to CML - Jonathan Swift
[SI-LIST] Re: PCI - Ingraham, Andrew
[SI-LIST] Re: SSTL Standard - Ray Anderson
[SI-LIST] Re: Via modeling & de-embedding - David Siadat
[SI-LIST] the relation between speed grade and rising time of altera fpga devices - Jerry John
[SI-LIST] Low noise electronics and Xilinx high-speed links - Andreas Kaeufl
[SI-LIST] Re: Low noise electronics and Xilinx high-speed links - williamsbar
[SI-LIST] Re: Via modeling & de-embedding - Geoff Stokes
[SI-LIST] Re: Via modeling & de-embedding - Scott McMorrow
[SI-LIST] Re: Low noise electronics and Xilinx high-speed links - Ken Cantrell
[SI-LIST] question regarding Ansoft Maxwell 2D repetitive simulations - ayhz2003
[SI-LIST] Re: question regarding Ansoft Maxwell 2D repetitive simulations - Craig Clewell
[SI-LIST] Re: question regarding Ansoft Maxwell 2D repetitive simulations - Ken Cantrell
[SI-LIST] Re: question regarding Ansoft Maxwell 2D repetitive simulations - giancarlo guida
[SI-LIST] Re: question regarding Ansoft Maxwell 2D repetitive simulations - Russell D. Moser
[SI-LIST] Re: question regarding Ansoft Maxwell 2D repetitive simulations - Aubrey_Sparkman
[SI-LIST] The precision of Ansoft Maxwell 2D - zhangkun 29902
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - Scott McMorrow
[SI-LIST] Re: Dear, can anybody tell me what's the max overshoot and min undershoot value of PCI? thank you! - Ingraham, Andrew
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - zhangkun 29902
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - Scott McMorrow
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - Mellitz, Richard
[SI-LIST] Re: Via modeling & de-embedding - David Siadat
[SI-LIST] How to interpret Jitter Specification - Bashir, Shiraz (MED)
[SI-LIST] Re: How to interpret Jitter Specification - steve weir
[SI-LIST] Re: How to measure voltage drop on plane - John Fisher
[SI-LIST] ECL model - Xiaoling Huang
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - zhangkun 29902
[SI-LIST] Re: The precision of Ansoft Maxwell 2D - Ray Anderson
[SI-LIST] Re: How to measure voltage drop on plane - boris . traa
[SI-LIST] LVTTL to HSTL - kbkrishnan
[SI-LIST] Re: How to measure voltage drop on plane - steve weir
[SI-LIST] Re: How to measure voltage drop on plane - Michael E. Vrbanac
[SI-LIST] Re: How to measure voltage drop on plane - zhangkun 29902
[SI-LIST] Re: EMI simulation tools - 'Ron Matthews'
[SI-LIST] Hi,all. How can we do if DDRI and DDR2 are laid in the same trace? How to deal with the termination? thanks! - Jie J. Zhou
[SI-LIST] xtk application crashes - BRanjul
[SI-LIST] Re: xtk application crashes - Hargin, Bill
[SI-LIST] SPICE for LINUX - sivi.cla@xxxxxxxxx
[SI-LIST] SPICE for LINUX - sivi.cla@xxxxxxxxx
[SI-LIST] Re: SPICE for LINUX - Stuart Brorson
[SI-LIST] Re: xtk application crashes - Prasanna R - CTD, Chennai.
[SI-LIST] skin effect - Santhosh E P (setavala)
[SI-LIST] Re: skin effect - Dunbar, Tony
[SI-LIST] - Yee Chung
[SI-LIST] Re: skin effect - Gil Gafni
[SI-LIST] Re: skin effect - dan.crain
[SI-LIST] Re: How to measure voltage drop on plane - Geoff Stokes
[SI-LIST] Re: SPICE for LINUX - Lynne Green
[SI-LIST] Re: skin effect - andrew . c . byers
[SI-LIST] Re: skin effect - Gil Gafni
[SI-LIST] Re: skin effect - Gil Gafni
[SI-LIST] Smart Voltage Regulator for PCI Card - Nitin Sood
[SI-LIST] SI Simulation of GHz signals - Clifford van Dyk
[SI-LIST] Re: SI Simulation of GHz signals - Yafei Bi
[SI-LIST] Sr. Signal Integrity Engineer opportunity - James L. Fitzpatrick
[SI-LIST] Re: SI Simulation of GHz signals - Julian Ferry
[SI-LIST] Re: SI Simulation of GHz signals - Dunbar, Tony
[SI-LIST] Re: SI Simulation of GHz signals - christopher . heard
[SI-LIST] Re: SI Simulation of GHz signals - ronald miller
[SI-LIST] series resistor on SSTL-2 - Leong
[SI-LIST] Re: Sr. Signal Integrity Engineer opportunity - Ray Anderson
[SI-LIST] Re: SPICE for LINUX - Uday A
[SI-LIST] Re: SPICE for LINUX - Lynne Green
[SI-LIST] Re: SI Simulation of GHz signals - Pratt, Gary
[SI-LIST] Re: SI Simulation of GHz signals - Suresh Subramaniam
[SI-LIST] Re: Hspice with IBIS model containing driver schedule - Steve Nguyen
[SI-LIST] Manipulation of ICM and/or ICEM model in EDA tool - Sogo Hsu
[SI-LIST] Re: series resistor on SSTL-2 - Ray Anderson
[SI-LIST] Re: SI Simulation of GHz signals - databits
[SI-LIST] DRAM Address lines : Daisy Chain or "T"? - SEOW, ERWIN
[SI-LIST] Re: DRAM Address lines : Daisy Chain or "T"? - steve weir
[SI-LIST] Re: SI Simulation of GHz signals - giancarlo guida
[SI-LIST] Oscilloscope probe modeling - Amir Pinhasovich
[SI-LIST] Re: series resistor on SSTL-2 - Peterson, James F (FL51)
[SI-LIST] Re: SI Simulation of GHz signals - Craig Clewell
[SI-LIST] Re: SI Simulation of GHz signals - Zanella, Fabrizio
[SI-LIST] Re: [Bulk] Re: SI Simulation of GHz signals - Ray Anderson
[SI-LIST] Re: SI Simulation of GHz signals - ronald miller
[SI-LIST] Re: SI Simulation of GHz signals - Russell D. Moser
[SI-LIST] Re: SI Simulation of GHz signals - Ken Willis
[SI-LIST] Re: SI Simulation of GHz signals - Michael E. Vrbanac
[SI-LIST] SDRAM output impedance - Leong
[SI-LIST] Re: Oscilloscope probe modeling - V S
[SI-LIST] DDR Eye diagrams - Novak David
[SI-LIST] Re: DDR Eye diagrams - ji-wei_du
[SI-LIST] AW: DDR Eye diagrams - hermann.ruckerbauer
[SI-LIST] Re: AW: DDR Eye diagrams - john
[SI-LIST] Re: AW: DDR Eye diagrams - ji-wei_du
[SI-LIST] AW: AW: DDR Eye diagrams - hermann.ruckerbauer
[SI-LIST] Re: AW: DDR Eye diagrams - ji-wei_du
[SI-LIST] Re: DDR Eye diagrams - Novak David
[SI-LIST] Drivers on a 50Ohm line - Bhagwath, Nitin
[SI-LIST] Re: Drivers on a 50Ohm line - steve weir
[SI-LIST] Re: Drivers on a 50Ohm line - Clifford van Dyk
[SI-LIST] Re: si-list: clifford@blackhole.net post needs approval - Ray Anderson
[SI-LIST] Re: SI Simulation of GHz signals - Clifford van Dyk
[SI-LIST] resitor packs vs networks in DDR design - Alex Jose
[SI-LIST] Re: SI Simulation of GHz signals - Ray Anderson
[SI-LIST] Re: Drivers on a 50Ohm line - Bhagwath, Nitin
[SI-LIST] Re: resitor packs vs networks in DDR design - Stefan Ludwig
[SI-LIST] Re: Drivers on a 50Ohm line - Bhagwath, Nitin
[SI-LIST] Subject: SI Simulation of GHz signals_28Jul04 - Ekkehard Miersch
[SI-LIST] DDR DRAM - Landrum, Chris
[SI-LIST] Re: DDR DRAM - Scott McMorrow
[SI-LIST] Re: Drivers on a 50Ohm line - Dav0 Lieby
[SI-LIST] Re: DDR DRAM - Landrum, Chris
[SI-LIST] Re: DDR DRAM - Moran, Brian P
[SI-LIST] DesignCon 2005 call for papers - Zhiping Yang
[SI-LIST] Re: Drivers on a 50Ohm line - Bhagwath, Nitin
[SI-LIST] Fwd: Re: Re: Drivers on a 50Ohm line - Dav0 Lieby
[SI-LIST] Announcement: Mayo EM Solver Software Available - Techentin, Robert W.
[SI-LIST] about XAUI error - myan
[SI-LIST] Andreas Graevinghoff/DE/ETAS is out of office. - Andreas . Graevinghoff
[SI-LIST] Re: about XAUI error - steve weir
[SI-LIST] Re: si-list Digest V4 #302 - Rajesh NARWAL
[SI-LIST] Re: How to measure voltage drop on plane - boris . traa