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[SI-LIST] Re: Recommendation for high-speed digital input protection?
- From: "Tom Biggs" <tbiggs@xxxxxxxxxxxxxxxxxxxxx>
- To: <jpnicholls@xxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 10 Jul 2003 08:14:24 -0700
The FPGA should have some ESD protection built-in.
The lowest capacitance I've seen in a protection part is Cal Micro's
CM1213.
-tom
-----Original Message-----
From: JP Nicholls [mailto:jpnicholls@xxxxxxxx]=20
Sent: Thursday, July 10, 2003 7:31 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Recommendation for high-speed digital input
protection?
si-list Digest V3 #183
We have a fast digital connection (1.8Gbps) which is going =20
to the front panel of a unit. The connection is direct to an FPGA.
Such "outside world" Connectors are usually protected against =20
ESD using transorbs or zener diodes on the input lines. At =20
these gigabit speeds, zeners become capacitors and will distort the
signal.
Can anyone recommend a suitable input protection scheme, or =20
any particular manufacturers products?
Many thanks,
--
JP Nicholls / jpnicholls@xxxxxxxx
Digital Design Engineer
Powerwave UK Ltd
Embassy House
Queen's Avenue
Bristol, BS8 1SB
United Kingdom
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