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[SI-LIST] Re: via teardropping effect on signal integrity?
- From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
- To: ivor@xxxxxxxxxxx
- Date: Tue, 01 Jul 2003 19:59:08 -0700
Ivor,
The short answer is no. Teardropping will not be a problem for your design
scott
--
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
Ivor Bowden wrote:
>Hi, if I have a fairly standard stackup (sig,plane,sig,sig,plane,sig;
>signal traces are 80 ohms) with .006"/.006" trace/space and .040" via
>pads with .008" finished hole size, signal trace lengths of 2.5" and
>7.5", would there be any significant issues with teardropping the vias?
>The signals are either PCI (66MHz clock) or analog/LVDS.
>tia,
>Ivor Bowden
>
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