FreeLists / si-list / [SI-LIST] Re: IBIS Timing Analysis

[Robert Haller <rhaller@xxxxxxxxxx>]

Ned ,
        Jon and Weston have both made good points.
Many of us have struggled, and come up with our own workaround to deal 
with how the PCI specifies standard loads. To specify unique loads based 
on corner and edge seems counter intuitive. If fast (FF) you tie to one 
standard load . If you run slow you ties to a different test load. You 
have to also tie to different voltages (in the slow case).  Lets not 
forget the measurement points are different for rising and falling edges 
too.

A standard load or test load should be utilize to specify a parts AC 
specs and IMHO should be either

1. Representative of the actual network the cell was designed for.
2. The actual test load (fixture) the part will be measured under.
3. A compromise of 1 or 2

I also will mention that I know of ONE tool that can automatically 
handle this in an integrated SI and timing analysis. Hint - check out 
our web site www.sisoft.com

Regards,
bob

-- 
Robert J. Haller (rhaller@xxxxxxxxxx)
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15




Beal, Weston wrote:
> Ned,
> 
 >.....but I don't know of any simulators that take advantage of that 
 >feature yet for the automatic timing derating.
> 
> Good Luck,
> Weston
> 
>

....

>
> Should I disable the automatic delay subtracting feature of the tool to 
> obtain flight 
> times which do not subtract out the test load buffer delay. Then simulate the 
> IBIS model 
> into the test load to obtain the buffer delay into the test load. Then, 
> subtract this 
> value from the simulator flight times in a separate spreadsheet to obtain 
> more accurate 
> flight times? 
> 
> OR
> 
> Should I change the test load in the IBIS model to correspond to the 
> datasheet or PCI 
> specified load?
> 
> OR ???
> 
> Your help is much needed and appreciated.
> 
> Thanks,
> Ned Dempsher
> L-3 Communications
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