FreeLists / si-list / [SI-LIST] Re: Trace Width @ 3Gb/s

["Rudy Sterner" <rsterner@xxxxxxxx>]

I just realized that I miss-stated my original message.  The test
we are running is a loopback test.  That is 5 inches to the connector
and 5 inches back.  Thus, the actual data path length is 10 inches.
My apologies for my error on this point.

Regards

Rudy Sterner


----- Original Message -----
From: "DAmbrosia, John F" <john.dambrosia@xxxxxxxxxxxxxxxxxxx>
To: <rsterner@xxxxxxxx>
Sent: Monday, June 10, 2002 8:22 AM
Subject: RE: [SI-LIST] Trace Width @ 3Gb/s


> Rudy,
> Trace width will make some difference in performance, but I can't believe
at
> 5 inches you will be shut down.  You do not comment on how thick the
> backplane this trace is running on is... that could actually be more of
the
> killer... a top layer connection on a 0.300" backplane... could be a major
> problem...
>
> If you have any further questions please feel free to contact me...
>
> John
>
> -----Original Message-----
> From: Rudy Sterner [mailto:rsterner@xxxxxxxx]
> Sent: Monday, June 10, 2002 11:14 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Trace Width @ 3Gb/s
>
>
> Hello,
>
>    We have some issues with a SerDes which we think
> may be related to the trace width on the serial line.  The
> serial  port is a differential pair passing data at 3 Gb/s.
> The trace width is 4 mils.  Length is approximately 5 inches.
> The differential impedance is 100 Ohms.  Other information
> which may be of use is the board material is FR-4 with an
> Er of 3.9.  It is specified at this data rate.
>
>   My question is:  Are the traces too narrow?  Should I
> expect better performance with 8-mil traces?
>
> Thank You
>
> Rudy Sterner
> LSI Logic
>
>
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> -- File: Rudy Sterner.vcf
>
>
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