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[SI-LIST] Questions Concerning BGA Mounting

  • From: Paul Levin <levinpa@xxxxxxxxxxxxx>
  • To: "Reflector, SI-List" <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 06 Jun 2002 10:25:10 -0700
Dear SI-List,

I'm trying to model some PCB traces that run underneath a BGA package
and the traces on the BGA substrate itself. If anyone could give me some
clues, I would really appreciate it.

1) How high is the air gap between the PCB and a mounted BGA part?

2) What material is typically used for BGA substrates? Any idea of its
K and loss tangent properties.

3) Are the traces on the substrate itself typically single layer, or does the
substrate use a multiple signal layer structure? (My device as a couple
hundred "pins.")

4) TDR measurements indicate that there are two points of capacitance
when the package is mounted, one at the location of the "pin" and the
other (presumably) at the location of the chip. Does this sound right to
you experts?

Many thanks for your assistance.

Sincerely,

Paul

--
Paul A. Levin
Senior Principal Engineer
Xyratex, Manhattan Beach
(310) 372-7352 - home & office
(310) 291-8199 - cell


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