FreeLists / si-list / [SI-LIST] Re: HSPICE W element field solver model

[mmunroe <mmunroe@xxxxxxxxxxxxxx>]

Dear Alex,

I take exception to Mike's comment "Fire the consultant."  I certainly
don't know all the details and I don't suggest that a data rate of 3
Gigabits/second is easy to execute, within standard FR-4.  However there
are consultants who have accomplished 3 Gigabits/second on FR-4 for more
than a couple of projects. The signaling technology, the distances to be
traversed, proximity to noise sources and other design requirements will be
the factors which together will ultimately determine the feasibility of 
your effort.  However, I would not presume to say that 3 Gigabits/second on
FR-4 is an unreasonable design goal today.

Several connector manufacturer's, ERNI included, have published system
simulations demonstrating equally data rates over significant distances
through two connector interfaces.  Actual system demonstrations have been
performed also demonstrating these data rates.  That is exactly why
differential connectors and fabless IP semiconductor companies like Velio
Communications are putting such an emphasis in this application area.  It
is just that what was nearly impossible 24 months ago is becoming eminently
practical now.

michael munroe
The ERNI Group
804-530-4283
mmunroe@xxxxxxxxx

-------------Forwarded Message-----------------
From:   INTERNET:si-list@xxxxxxxxxxxxx, INTERNET:si-list@xxxxxxxxxxxxx
To:     "'si-list@xxxxxxxxxxxxx'", INTERNET:si-list@xxxxxxxxxxxxx
Date:   6/8/101 10:55 PM
RE:     [SI-LIST] Re: HSPICE W element field solver model
 
Fire the consultatnt.

Mike.

-----Original Message-----
From: Alex Horvath [mailto:alexh@xxxxxxxxxxxxxxxx]
Sent: Friday, June 08, 2001 1:31 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: HSPICE W element field solver model

Chris,
I found your statements below very interesting because we have a consultant
working for us that's telling us 3 gig on a FR-4 backplane (20") is no big
deal. I told him I had some concerns based on the chip manufacturers data
which recommended GETEK or similar. Do any simulators take losses into
account?

Are there any publications or papers that discuss in more detail the DK and
loss tan you mentioned below? This is the first time I have worked at
frequencies where this is a concern.

Thanks,  Alex H

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Mesibov
Sent: Friday, June 08, 2001 4:58 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: HSPICE W element field solver model

Most PCB fabricators and their lamenate suppliers don't characterize FR4
above 1.5 GHz (i.e. for DK and loss tan).  Therefore specifying controlled
impedance lines intended for this bandwidth should be rejected by any fab
house worth
their salt. The problem is that the studies of FR4 at frequencies up to
10Ghz show
dramatic changes in loss tan and DK over freq and temp.  What this would
result in
for digital signals is group delay and rise time degradation.  Group delay
is
when the fourier components of the waveform propagate down the transmission
line
at different rates.  The rise time degrades because as the frequency
increases,
so does the loss tangent.  This has the effect of attenuating the harmonics
of
the waveform, thus slowing the rise time.

Hope this sheds some light.

Chris

Alex March wrote:

>   Dear SI experts,
>
>   I would like to ask about your experiences with the
> W element field solver model in HSPICE. I am trying to
> make some simulations in the Gigahertz range with FR4
> material and I am not sure about what value I should
> use for the conductivity of FR4.
>
> Thank you,
>
> Alex
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--
 Chris Mesibov
 Sr. Hardware Engineer Fujitsu Network Communications, Inc.
 Phone:(845)731-2037   2 Blue Hill Plaza, 6th Floor
 Fax:  (845)731-2011   Pearl River, NY 10965

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