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[SI-LIST] Re: Information on CML I/O's
- From: "Inmyung Song" <imsong@xxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Sat, 9 Jun 2001 14:52:03 +0900
----- Original Message -----
From: "Peter LaFlamme" <plaflamm@xxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Saturday, June 09, 2001 3:59 AM
Subject: [SI-LIST] Information on CML I/O's
> Hi SI Folks,
> Can anyone direct me to detailed information on CML (Current Mode Logic)
> I/O technology? I would like to understand the advantages/disadvantages
> versus LVDS/PECL technology and what some of the PCB layout (and design)
> constraints are. Any help is greatly appreciated...
>
> Thanks
> Peter
>
> --
> Peter LaFlamme
>
> Applied Micro Circuits Corp.
> Staff System Applications Engineer
> 200 Minuteman Rd, 3rd Floor
> Andover, MA 01810
>
> 978-247-8470 phone
> 978-623-0055 Fax
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