FreeLists / si-list / [SI-LIST] Re: HSPICE W element field solver model

[Michael Khusid <mkhusid@xxxxxxxxxxxxxxxxxx>]

Alex, 

I think the trick is using the right combination of backplane material and
chip technology. From what I've seen, some chips can drive 20" of FR-4 and
some can't; so, one cannot make a rule of thumb about 3 Gbps signals over
20" of FR-4.

In reality, it's a balance between driver+receiver technology versus
backplane technology. It's certainly true that high speed properties of FR-4
are poor, but detailed simulations may clearly demonstrate that your
favourite driver/receiver can suceed in driving 20" or even longer traces
(they may demonstrate just the opposite, of course).

Teradyne published a couple of white papers on this topic -- look them up at
http://www.teradyne.com/prods/tcs/about_tcs/whitepapers.html

Mike Khusid

> -----Original Message-----
> From: Larry Miller [mailto:ldmiller@xxxxxxxxxxxxxxxxxxxx]
> Sent: Friday, June 08, 2001 1:38 PM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] Re: HSPICE W element field solver model
> 
> 
> The backplane companies like Tyco seem confident about it, 
> and they have
> been building back- and mid-planes for telcos for years.
> 
> It will be interesting to see where this goes.
> 
> Larry Miller
> 
> -----Original Message-----
> From: Alex Horvath [mailto:alexh@xxxxxxxxxxxxxxxx]
> Sent: Friday, June 08, 2001 10:31 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: HSPICE W element field solver model
> 
> 
> Chris,
> I found your statements below very interesting because we 
> have a consultant
> working for us that's telling us 3 gig on a FR-4 backplane 
> (20") is no big
> deal. I told him I had some concerns based on the chip 
> manufacturers data
> which recommended GETEK or similar. Do any simulators take losses into
> account?
> 
> Are there any publications or papers that discuss in more 
> detail the DK and
> loss tan you mentioned below? This is the first time I have worked at
> frequencies where this is a concern.
> 
> Thanks,  Alex H
> 
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Mesibov
> Sent: Friday, June 08, 2001 4:58 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: HSPICE W element field solver model
> 
> 
> Most PCB fabricators and their lamenate suppliers don't 
> characterize FR4
> above
> 1.5 GHz (i.e. for DK and loss tan).  Therefore specifying controlled
> impedance
> lines intended for this bandwidth should be rejected by any 
> fab house worth
> their salt.
> The problem is that the studies of FR4 at frequencies up to 10Ghz show
> dramatic
> changes in loss tan and DK over freq and temp.  What this 
> would result in
> for
> digital signals is group delay and rise time degradation.  
> Group delay is
> when
> the fourier components of the waveform propagate down the 
> transmission line
> at
> different rates.  The rise time degrades because as the 
> frequency increases,
> so
> does the loss tangent.  This has the effect of attenuating 
> the harmonics of
> the
> waveform, thus slowing the rise time.
> 
> Hope this sheds some light.
> 
> Chris
> 
> Alex March wrote:
> 
> >   Dear SI experts,
> >
> >   I would like to ask about your experiences with the
> > W element field solver model in HSPICE. I am trying to
> > make some simulations in the Gigahertz range with FR4
> > material and I am not sure about what value I should
> > use for the conductivity of FR4.
> >
> > Thank you,
> >
> > Alex
> >
> >
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> 
> --
>  Chris Mesibov
>  Sr. Hardware Engineer Fujitsu Network Communications, Inc.
>  Phone:(845)731-2037   2 Blue Hill Plaza, 6th Floor
>  Fax:  (845)731-2011   Pearl River, NY 10965
> 
> 
> 
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