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[SI-LIST] Re: Relativity in EMC design
- From: "Mangipudi, Prasad" <Prasad_Mangipudi@xxxxxxxxxxx>
- To: 'Zhangkun' <zhang_kun@xxxxxxxxxx>, 'si-list' <si-list@xxxxxxxxxxxxx>
- Date: Tue, 13 May 2008 20:58:26 -0700
Hi Zhangkun,
There are many ways to skin a cat. A simple approach is to reduce the diel=
ectric thickness between the top layer and the next ground plane. This wil=
l reduce the loop area and so radiation but also reduces the impedance of t=
he trace. If you have a range of impedance that you can work with, then de=
liberately reducing the impedance as above will reduce the radiation. Other=
things like good stackup (all signals referenced to ground) and good high =
speed design practices are always required.
Good Luck!
Prasad
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On=
Behalf Of Zhangkun
Sent: Tuesday, May 13, 2008 3:04 AM
To: si-list
Subject: [SI-LIST] Relativity in EMC design
Hi all
Currently, we have measured the radiation of signal line on external layer =
of PCB. Based on the measurement result, we could gotten some design-guidel=
ine for layout.
For example, there is a external line of 6000mil. When the stimulus is 5mV=
at 400MHz, the RE radiation at 3m is 40dbuV/m. The FCC RE limitation is 47=
dbuV/m. There is remaining margin of 7db.
My question is 7db is enough or not. On the PCB, there will be more than on=
e line, which carry signal of 400MHz. The RE radiation maybe reinforce. How=
to evaluate the relativity effect of diffrent line carrying 400MHz signal?
Any advice will be helpful.
Best Regards
Zhangkun
2008.5.13
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Other related posts:[SI-LIST] Relativity in EMC design [SI-LIST] Re: Relativity in EMC design [SI-LIST] 答复: Relativity in EMC design [SI-LIST] Re: Relativity in EMC design [SI-LIST] Re: 答复: Relativity in EMC design
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