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[SI-LIST] Re: VHDL UART
- From: "Ferhat Yaldiz" <ferhat.yaldiz@xxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 8 May 2008 10:20:15 +0300
Hi,
I tried very different VHDL UART core. (for Xilinx Device)
- OpenCores (miniUART)
- QuickLogic , http://www.quicklogic.com/images/appnote20.pdf
- Xilinx CPLD UART
- Digilent UART http://www.digilentinc.com/Resources/VHDL.cfm
In my opinion, best of Uart component is digilent uart design. It is based
on
State machine and easy to read code and it has many explanations.
I tried 1MHz speed. It is perfect. It uses only 65 logic cell.
Ferhat,
***************************************
Ferhat YALDIZ
Hardware Design Eng.
Information Tech. Inst. - TUBITAK
Gebze - Kocaeli
TURKIYE
***************************************
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