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[SI-LIST] SSTl2 SSO simulation set-up
- From: Canes Venatici <starsilic@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 2 May 2007 01:40:49 -0700 (PDT)
Hi,
I could see in some documents, the SSO simulation set up for SSTL2 interface is
like below.
I want to know whether the schematic below represents the correct simulation
set-up for SSTL2 quite node
SSO simulation.
I tried inserting transmission line between Rser and Cload-Rt junction. But I
get very different values
of noise compared to the results of provided in the doc, using the below set-up.
Could anyone explain which is correct method and how the schematic below can
represent the
T.Line effectd.
VTT
____
|
|
/
\ Rt
/
\
------------ ---------- |
| | | | Rser
|
| Driver |-------| Pkg | ------------/\/\/\/\/\/\----------|
| | | model
| |
| | | |
|
------------ ------------ |
==== Cload
|
|
|
_____
__
-
Regards
Canes
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